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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-11 17:56:49 +07:00
6da314122d
The DT branch adds a lot of new stuff for additional SoC and board support. The branch is the largest one and contains 513 out of the total 972 non-merge arm-soc changesets for 3.19. Most of the changes are about enabling additional on-chip devices for existing machines, but there are also an unusual number of new SoC types being added this time: * AMLogic Meson8 * ARM Realview in DT mode * Allwinner A80 * Broadcom BCM47081 * Broadcom Cygnus * Freescale LS1021A * Freescale Vybrid 500 series * Mediatek MT6592, MT8127, MT8135 * STMicroelectronics STiH410 * Samsung Exynos4415 The level of support for the above differs widely, some are just stubs with nothing more than CPU, memory and a UART, but others are fairly complete. As usual, these get extended over time. There are also many new boards getting added, this is the list of model strings that are showing up in new dts files: * ARM RealView PB1176 * Altera SOCFPGA Arria 10 * Asus RT-N18U (BCM47081) * Buffalo WZR-1750DHP (BCM4708) * Buffalo WZR-600DHP2 (BCM47081) * Cygnus Enterprise Phone (BCM911360_ENTPHN) * D-Link DIR-665 * Google Spring * IGEP COM MODULE Rev. G (TI OMAP AM/DM37x) * IGEPv2 Rev. F (TI OMAP AM/DM37x) * LS1021A QDS Board * LS1021A TWR Board * LeMaker Banana Pi * MarsBoard RK3066 * MediaTek MT8127 Moose Board * MediaTek MT8135 evaluation board * Mele M3 * Merrii A80 Optimus Board * Netgear R6300 V2 (BCM4708) * Nomadik STN8815NHK * NovaTech OrionLXm * Olimex A20-OLinuXino-LIME2 * Raspberry Pi Model B+ * STiH410 B2120 * Samsung Monk board * Samsung Rinato board * Synology DS213j * Synology DS414 * TBS2910 Matrix ARM mini PC * TI AM5728 BeagleBoard-X15 * Toradex Colibri VF50 on Colibri Evaluation Board * Zynq ZYBO Development Board Other notable changes include: * exynos: cleanup of existing dts files * mvebu: improved pinctrl support for Armada 370/XP * nomadik: restructuring dts files * omap: added CAN bus support * shmobile: added clock support for some SoCs * shmobile: added sound support for some SoCs * sirf: reset controller support * sunxi: continuing the relicensing under dual GPL/MIT * sunxi: lots of new on-chip device support * sunxi: working simplefb support (long awaited) * various: provide stdout-path property for earlycon -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAVIcj3mCrR//JCVInAQL9Nw//YKK1l5gDZMmJ5nZXapXaZXERACN1n7H6 9kkEZRF5ndUY4+MQmqYqHqBya04aQgnuHu0hsxbEAn2L3j2+ejZgc8XRqflArORy EXQvH/l6UNA11aCoLvKvT9fny76ZCOyEOALWXj9oLxhfd5X2d/So9q1ELFLgmc0S XnVMfpoXPeVPhe6l8EhF/qI0xYjM91CHWRopRQi6yp4DqFXV2+h5ggCpX1+S2e8L LyGNLk0RM9Mha+Qyy4O+LY+FoeWwDutQyat0ct9ov6FP8AYrR1N43d/ekJ57L8fU hVymo+5prUwEkIfQpsJQjPzonJxFssk1KD9t+GZ99VgEO02tvpjeB0nwoaWJxS25 MzU2Bgp0Z/Yu0Q0SGu5/fuMya1Mo+wRA1OyQLp515TQqdWyTLcPT9o/ahfw8Uf1W 6gBZoB+XXEQPI1sMHDDrn4r5T9mySsodAGfnvJoNxttnjCmVRzI5sXssnFji8TTF ciMEzfoTJNPqzxkzaOM13XmslKtFrI9A+DGgnOWn6oZXODzHcc6M+z/moiWy8b/e /HsbzWvp9HUPZVjM2AJR4iiyLXv7GRu9maNmGtoXKi9bnQDaNGWFovp/R5y8avQM xyzJ+6melNZnnoEue8/OOdum7jMeqPCRVQuqM2hKVcsmNEnb7kPBOi4AYXWTrTFO bcDvFylnmlA= =BHwA -----END PGP SIGNATURE----- Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Arnd Bergmann: "The DT branch adds a lot of new stuff for additional SoC and board support. The branch is the largest one and contains 513 out of the total 972 non-merge arm-soc changesets for 3.19. Most of the changes are about enabling additional on-chip devices for existing machines, but there are also an unusual number of new SoC types being added this time: - AMLogic Meson8 - ARM Realview in DT mode - Allwinner A80 - Broadcom BCM47081 - Broadcom Cygnus - Freescale LS1021A - Freescale Vybrid 500 series - Mediatek MT6592, MT8127, MT8135 - STMicroelectronics STiH410 - Samsung Exynos4415 The level of support for the above differs widely, some are just stubs with nothing more than CPU, memory and a UART, but others are fairly complete. As usual, these get extended over time. There are also many new boards getting added, this is the list of model strings that are showing up in new dts files: - ARM RealView PB1176 - Altera SOCFPGA Arria 10 - Asus RT-N18U (BCM47081) - Buffalo WZR-1750DHP (BCM4708) - Buffalo WZR-600DHP2 (BCM47081) - Cygnus Enterprise Phone (BCM911360_ENTPHN) - D-Link DIR-665 - Google Spring - IGEP COM MODULE Rev. G (TI OMAP AM/DM37x) - IGEPv2 Rev. F (TI OMAP AM/DM37x) - LS1021A QDS Board - LS1021A TWR Board - LeMaker Banana Pi - MarsBoard RK3066 - MediaTek MT8127 Moose Board - MediaTek MT8135 evaluation board - Mele M3 - Merrii A80 Optimus Board - Netgear R6300 V2 (BCM4708) - Nomadik STN8815NHK - NovaTech OrionLXm - Olimex A20-OLinuXino-LIME2 - Raspberry Pi Model B+ - STiH410 B2120 - Samsung Monk board - Samsung Rinato board - Synology DS213j - Synology DS414 - TBS2910 Matrix ARM mini PC - TI AM5728 BeagleBoard-X15 - Toradex Colibri VF50 on Colibri Evaluation Board - Zynq ZYBO Development Board Other notable changes include: - exynos: cleanup of existing dts files - mvebu: improved pinctrl support for Armada 370/XP - nomadik: restructuring dts files - omap: added CAN bus support - shmobile: added clock support for some SoCs - shmobile: added sound support for some SoCs - sirf: reset controller support - sunxi: continuing the relicensing under dual GPL/MIT - sunxi: lots of new on-chip device support - sunxi: working simplefb support (long awaited) - various: provide stdout-path property for earlycon" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (510 commits) ARM: dts: rk3288: add arm,cpu-registers-not-fw-configured Revert "ARM: dts: rockchip: temporarily disable smp on rk3288" ARM: BCM5301X: Add DT for Buffalo WZR-600DHP2 ARM: BCM5301X: Add DT for Asus RT-N18U ARM: BCM5301X: Add DT for Buffalo WZR-1750DHP ARM: BCM5301X: Add DT for Netgear R6300 V2 ARM: BCM5301X: Add buttons for Netgear R6250 ARM: dts: rockchip: Add input voltage supply regulators in pmic for Marsboard ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS file arm: dts: zynq: Add Digilent ZYBO board arm: dts: zynq: Move crystal freq. to board level doc: dt: vendor-prefixes: Add Digilent Inc Documentation: devicetree: Fix Xilinx VDMA specification ARM: dts: rockchip: set FIFO size for SDMMC, SDIO and EMMC on rk3066 and rk3188 ARM: dts: rockchip: add label property for leds on Radxa Rock ARM: BCM5301X: Add LEDs for Netgear R6250 V1 ARM: BCM5301X: Add Broadcom's bus-axi to the DTS file ARM: dts: add sysreg phandle to i2c device nodes for exynos ARM: dts: Remove unused bootargs from exynos3250-rinato ARM: dts: add board dts file for Exynos3250-based Monk board ...
619 lines
15 KiB
Plaintext
619 lines
15 KiB
Plaintext
#include "tegra30.dtsi"
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/**
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* This file contains common DT entry for all fab version of Cardhu.
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* There is multiple fab version of Cardhu starting from A01 to A07.
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* Cardhu fab version A01 and A03 are not supported. Cardhu fab version
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* A02 will have different sets of GPIOs for fixed regulator compare to
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* Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
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* compatible with fab version A04. Based on Cardhu fab version, the
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* related dts file need to be chosen like for Cardhu fab version A02,
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* use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
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* tegra30-cardhu-a04.dts.
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* The identification of board is done in two ways, by looking the sticker
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* on PCB and by reading board id eeprom.
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* The stciker will have number like 600-81291-1000-002 C.3. In this 4th
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* number is the fab version like here it is 002 and hence fab version A02.
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* The (downstream internal) U-Boot of Cardhu display the board-id as
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* follows:
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* BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
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* In this Fab version is 02 i.e. A02.
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* The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
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* The location 0x8 of this eeprom contains the Fab version. It is 1 byte
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* wide.
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*/
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/ {
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model = "NVIDIA Tegra30 Cardhu evaluation board";
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compatible = "nvidia,cardhu", "nvidia,tegra30";
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aliases {
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rtc0 = "/i2c@7000d000/tps65911@2d";
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rtc1 = "/rtc@7000e000";
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serial0 = &uarta;
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serial1 = &uartc;
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};
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memory {
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reg = <0x80000000 0x40000000>;
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};
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pcie-controller@00003000 {
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status = "okay";
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/* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
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avdd-pexb-supply = <&ldo1_reg>;
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vdd-pexb-supply = <&ldo1_reg>;
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avdd-pex-pll-supply = <&ldo1_reg>;
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hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
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vddio-pex-ctl-supply = <&sys_3v3_reg>;
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avdd-plle-supply = <&ldo2_reg>;
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pci@1,0 {
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nvidia,num-lanes = <4>;
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};
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pci@2,0 {
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nvidia,num-lanes = <1>;
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};
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pci@3,0 {
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status = "okay";
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nvidia,num-lanes = <1>;
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};
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};
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host1x@50000000 {
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dc@54200000 {
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rgb {
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status = "okay";
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nvidia,panel = <&panel>;
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};
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};
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};
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pinmux@70000868 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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sdmmc1_clk_pz0 {
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nvidia,pins = "sdmmc1_clk_pz0";
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nvidia,function = "sdmmc1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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sdmmc1_cmd_pz1 {
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nvidia,pins = "sdmmc1_cmd_pz1",
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"sdmmc1_dat0_py7",
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"sdmmc1_dat1_py6",
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"sdmmc1_dat2_py5",
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"sdmmc1_dat3_py4";
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nvidia,function = "sdmmc1";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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sdmmc3_clk_pa6 {
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nvidia,pins = "sdmmc3_clk_pa6";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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sdmmc3_cmd_pa7 {
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nvidia,pins = "sdmmc3_cmd_pa7",
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"sdmmc3_dat0_pb7",
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"sdmmc3_dat1_pb6",
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"sdmmc3_dat2_pb5",
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"sdmmc3_dat3_pb4";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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sdmmc4_clk_pcc4 {
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nvidia,pins = "sdmmc4_clk_pcc4",
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"sdmmc4_rst_n_pcc3";
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nvidia,function = "sdmmc4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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sdmmc4_dat0_paa0 {
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nvidia,pins = "sdmmc4_dat0_paa0",
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"sdmmc4_dat1_paa1",
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"sdmmc4_dat2_paa2",
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"sdmmc4_dat3_paa3",
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"sdmmc4_dat4_paa4",
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"sdmmc4_dat5_paa5",
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"sdmmc4_dat6_paa6",
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"sdmmc4_dat7_paa7";
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nvidia,function = "sdmmc4";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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dap2_fs_pa2 {
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nvidia,pins = "dap2_fs_pa2",
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"dap2_sclk_pa3",
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"dap2_din_pa4",
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"dap2_dout_pa5";
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nvidia,function = "i2s1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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sdio3 {
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nvidia,pins = "drive_sdio3";
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nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
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nvidia,schmitt = <TEGRA_PIN_DISABLE>;
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nvidia,pull-down-strength = <46>;
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nvidia,pull-up-strength = <42>;
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nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
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nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
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};
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uart3_txd_pw6 {
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nvidia,pins = "uart3_txd_pw6",
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"uart3_cts_n_pa1",
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"uart3_rts_n_pc0",
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"uart3_rxd_pw7";
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nvidia,function = "uartc";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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};
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};
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serial@70006000 {
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status = "okay";
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};
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serial@70006200 {
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compatible = "nvidia,tegra30-hsuart";
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status = "okay";
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};
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pwm@7000a000 {
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status = "okay";
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};
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panelddc: i2c@7000c000 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000c400 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000c500 {
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status = "okay";
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clock-frequency = <100000>;
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/* ALS and Proximity sensor */
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isl29028@44 {
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compatible = "isl,isl29028";
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reg = <0x44>;
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interrupt-parent = <&gpio>;
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interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
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};
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i2cmux@70 {
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compatible = "nxp,pca9546";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x70>;
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};
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};
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i2c@7000c700 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000d000 {
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status = "okay";
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clock-frequency = <100000>;
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wm8903: wm8903@1a {
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compatible = "wlf,wm8903";
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reg = <0x1a>;
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interrupt-parent = <&gpio>;
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interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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micdet-cfg = <0>;
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micdet-delay = <100>;
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gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
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};
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pmic: tps65911@2d {
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compatible = "ti,tps65911";
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reg = <0x2d>;
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <2>;
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interrupt-controller;
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ti,system-power-controller;
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#gpio-cells = <2>;
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gpio-controller;
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vcc1-supply = <&vdd_ac_bat_reg>;
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vcc2-supply = <&vdd_ac_bat_reg>;
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vcc3-supply = <&vio_reg>;
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vcc4-supply = <&vdd_5v0_reg>;
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vcc5-supply = <&vdd_ac_bat_reg>;
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vcc6-supply = <&vdd2_reg>;
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vcc7-supply = <&vdd_ac_bat_reg>;
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vccio-supply = <&vdd_ac_bat_reg>;
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regulators {
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vdd1_reg: vdd1 {
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regulator-name = "vddio_ddr_1v2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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vdd2_reg: vdd2 {
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regulator-name = "vdd_1v5_gen";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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};
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vddctrl_reg: vddctrl {
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regulator-name = "vdd_cpu,vdd_sys";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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vio_reg: vio {
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regulator-name = "vdd_1v8_gen";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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ldo1_reg: ldo1 {
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regulator-name = "vdd_pexa,vdd_pexb";
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regulator-min-microvolt = <1050000>;
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regulator-max-microvolt = <1050000>;
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};
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ldo2_reg: ldo2 {
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regulator-name = "vdd_sata,avdd_plle";
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regulator-min-microvolt = <1050000>;
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regulator-max-microvolt = <1050000>;
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};
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/* LDO3 is not connected to anything */
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ldo4_reg: ldo4 {
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regulator-name = "vdd_rtc";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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ldo5_reg: ldo5 {
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regulator-name = "vddio_sdmmc,avdd_vdac";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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ldo6_reg: ldo6 {
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regulator-name = "avdd_dsi_csi,pwrdet_mipi";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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};
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ldo7_reg: ldo7 {
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regulator-name = "vdd_pllm,x,u,a_p_c_s";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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ldo8_reg: ldo8 {
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regulator-name = "vdd_ddr_hs";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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};
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};
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temperature-sensor@4c {
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compatible = "onnn,nct1008";
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reg = <0x4c>;
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vcc-supply = <&sys_3v3_reg>;
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interrupt-parent = <&gpio>;
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interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
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};
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tps62361@60 {
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compatible = "ti,tps62361";
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reg = <0x60>;
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regulator-name = "tps62361-vout";
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regulator-min-microvolt = <500000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
ti,vsel0-state-high;
|
|
ti,vsel1-state-high;
|
|
};
|
|
};
|
|
|
|
spi@7000da00 {
|
|
status = "okay";
|
|
spi-max-frequency = <25000000>;
|
|
spi-flash@1 {
|
|
compatible = "winbond,w25q32";
|
|
reg = <1>;
|
|
spi-max-frequency = <20000000>;
|
|
};
|
|
};
|
|
|
|
pmc@7000e400 {
|
|
status = "okay";
|
|
nvidia,invert-interrupt;
|
|
nvidia,suspend-mode = <1>;
|
|
nvidia,cpu-pwr-good-time = <2000>;
|
|
nvidia,cpu-pwr-off-time = <200>;
|
|
nvidia,core-pwr-good-time = <3845 3845>;
|
|
nvidia,core-pwr-off-time = <0>;
|
|
nvidia,core-power-req-active-high;
|
|
nvidia,sys-clock-req-active-high;
|
|
};
|
|
|
|
ahub@70080000 {
|
|
i2s@70080400 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
sdhci@78000000 {
|
|
status = "okay";
|
|
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
|
|
wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
|
|
power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
|
|
bus-width = <4>;
|
|
};
|
|
|
|
sdhci@78000600 {
|
|
status = "okay";
|
|
bus-width = <8>;
|
|
non-removable;
|
|
};
|
|
|
|
usb@7d008000 {
|
|
status = "okay";
|
|
};
|
|
|
|
usb-phy@7d008000 {
|
|
vbus-supply = <&usb3_vbus_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
backlight: backlight {
|
|
compatible = "pwm-backlight";
|
|
|
|
enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
|
|
power-supply = <&vdd_bl_reg>;
|
|
pwms = <&pwm 0 5000000>;
|
|
|
|
brightness-levels = <0 4 8 16 32 64 128 255>;
|
|
default-brightness-level = <6>;
|
|
};
|
|
|
|
clocks {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
clk32k_in: clock@0 {
|
|
compatible = "fixed-clock";
|
|
reg=<0>;
|
|
#clock-cells = <0>;
|
|
clock-frequency = <32768>;
|
|
};
|
|
};
|
|
|
|
panel: panel {
|
|
compatible = "chunghwa,claa101wb01", "simple-panel";
|
|
ddc-i2c-bus = <&panelddc>;
|
|
|
|
power-supply = <&vdd_pnl1_reg>;
|
|
enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
|
|
|
|
backlight = <&backlight>;
|
|
};
|
|
|
|
regulators {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
vdd_ac_bat_reg: regulator@0 {
|
|
compatible = "regulator-fixed";
|
|
reg = <0>;
|
|
regulator-name = "vdd_ac_bat";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
cam_1v8_reg: regulator@1 {
|
|
compatible = "regulator-fixed";
|
|
reg = <1>;
|
|
regulator-name = "cam_1v8";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
enable-active-high;
|
|
gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
|
|
vin-supply = <&vio_reg>;
|
|
};
|
|
|
|
cp_5v_reg: regulator@2 {
|
|
compatible = "regulator-fixed";
|
|
reg = <2>;
|
|
regulator-name = "cp_5v";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
enable-active-high;
|
|
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
emmc_3v3_reg: regulator@3 {
|
|
compatible = "regulator-fixed";
|
|
reg = <3>;
|
|
regulator-name = "emmc_3v3";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
enable-active-high;
|
|
gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
|
|
vin-supply = <&sys_3v3_reg>;
|
|
};
|
|
|
|
modem_3v3_reg: regulator@4 {
|
|
compatible = "regulator-fixed";
|
|
reg = <4>;
|
|
regulator-name = "modem_3v3";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
enable-active-high;
|
|
gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
pex_hvdd_3v3_reg: regulator@5 {
|
|
compatible = "regulator-fixed";
|
|
reg = <5>;
|
|
regulator-name = "pex_hvdd_3v3";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
enable-active-high;
|
|
gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
|
|
vin-supply = <&sys_3v3_reg>;
|
|
};
|
|
|
|
vdd_cam1_ldo_reg: regulator@6 {
|
|
compatible = "regulator-fixed";
|
|
reg = <6>;
|
|
regulator-name = "vdd_cam1_ldo";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
enable-active-high;
|
|
gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
|
|
vin-supply = <&sys_3v3_reg>;
|
|
};
|
|
|
|
vdd_cam2_ldo_reg: regulator@7 {
|
|
compatible = "regulator-fixed";
|
|
reg = <7>;
|
|
regulator-name = "vdd_cam2_ldo";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
enable-active-high;
|
|
gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
|
|
vin-supply = <&sys_3v3_reg>;
|
|
};
|
|
|
|
vdd_cam3_ldo_reg: regulator@8 {
|
|
compatible = "regulator-fixed";
|
|
reg = <8>;
|
|
regulator-name = "vdd_cam3_ldo";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
enable-active-high;
|
|
gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
|
|
vin-supply = <&sys_3v3_reg>;
|
|
};
|
|
|
|
vdd_com_reg: regulator@9 {
|
|
compatible = "regulator-fixed";
|
|
reg = <9>;
|
|
regulator-name = "vdd_com";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
enable-active-high;
|
|
gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
|
|
vin-supply = <&sys_3v3_reg>;
|
|
};
|
|
|
|
vdd_fuse_3v3_reg: regulator@10 {
|
|
compatible = "regulator-fixed";
|
|
reg = <10>;
|
|
regulator-name = "vdd_fuse_3v3";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
enable-active-high;
|
|
gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
|
|
vin-supply = <&sys_3v3_reg>;
|
|
};
|
|
|
|
vdd_pnl1_reg: regulator@11 {
|
|
compatible = "regulator-fixed";
|
|
reg = <11>;
|
|
regulator-name = "vdd_pnl1";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
enable-active-high;
|
|
gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
|
|
vin-supply = <&sys_3v3_reg>;
|
|
};
|
|
|
|
vdd_vid_reg: regulator@12 {
|
|
compatible = "regulator-fixed";
|
|
reg = <12>;
|
|
regulator-name = "vddio_vid";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
enable-active-high;
|
|
gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
|
|
gpio-open-drain;
|
|
vin-supply = <&vdd_5v0_reg>;
|
|
};
|
|
};
|
|
|
|
sound {
|
|
compatible = "nvidia,tegra-audio-wm8903-cardhu",
|
|
"nvidia,tegra-audio-wm8903";
|
|
nvidia,model = "NVIDIA Tegra Cardhu";
|
|
|
|
nvidia,audio-routing =
|
|
"Headphone Jack", "HPOUTR",
|
|
"Headphone Jack", "HPOUTL",
|
|
"Int Spk", "ROP",
|
|
"Int Spk", "RON",
|
|
"Int Spk", "LOP",
|
|
"Int Spk", "LON",
|
|
"Mic Jack", "MICBIAS",
|
|
"IN1L", "Mic Jack";
|
|
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
|
nvidia,audio-codec = <&wm8903>;
|
|
|
|
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
|
|
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
|
|
GPIO_ACTIVE_HIGH>;
|
|
|
|
clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
|
|
<&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
|
|
<&tegra_car TEGRA30_CLK_EXTERN1>;
|
|
clock-names = "pll_a", "pll_a_out0", "mclk";
|
|
};
|
|
};
|