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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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09ec417b0e
Samsung E-die SLC NAND manufactured using 21nm process (K9F1G08U0E) does not support partial page programming, so disable subpage writes for it. Manufacturing process is stored in lowest two bits of 5th ID byte. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
135 lines
3.1 KiB
C
135 lines
3.1 KiB
C
/*
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* Copyright (C) 2017 Free Electrons
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* Copyright (C) 2017 NextThing Co
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*
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* Author: Boris Brezillon <boris.brezillon@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/mtd/rawnand.h>
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static void samsung_nand_decode_id(struct nand_chip *chip)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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/* New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44) */
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if (chip->id.len == 6 && !nand_is_slc(chip) &&
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chip->id.data[5] != 0x00) {
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u8 extid = chip->id.data[3];
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/* Get pagesize */
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mtd->writesize = 2048 << (extid & 0x03);
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extid >>= 2;
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/* Get oobsize */
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switch (((extid >> 2) & 0x4) | (extid & 0x3)) {
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case 1:
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mtd->oobsize = 128;
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break;
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case 2:
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mtd->oobsize = 218;
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break;
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case 3:
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mtd->oobsize = 400;
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break;
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case 4:
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mtd->oobsize = 436;
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break;
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case 5:
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mtd->oobsize = 512;
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break;
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case 6:
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mtd->oobsize = 640;
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break;
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default:
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/*
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* We should never reach this case, but if that
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* happens, this probably means Samsung decided to use
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* a different extended ID format, and we should find
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* a way to support it.
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*/
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WARN(1, "Invalid OOB size value");
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break;
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}
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/* Get blocksize */
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extid >>= 2;
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mtd->erasesize = (128 * 1024) <<
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(((extid >> 1) & 0x04) | (extid & 0x03));
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/* Extract ECC requirements from 5th id byte*/
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extid = (chip->id.data[4] >> 4) & 0x07;
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if (extid < 5) {
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chip->ecc_step_ds = 512;
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chip->ecc_strength_ds = 1 << extid;
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} else {
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chip->ecc_step_ds = 1024;
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switch (extid) {
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case 5:
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chip->ecc_strength_ds = 24;
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break;
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case 6:
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chip->ecc_strength_ds = 40;
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break;
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case 7:
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chip->ecc_strength_ds = 60;
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break;
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default:
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WARN(1, "Could not decode ECC info");
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chip->ecc_step_ds = 0;
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}
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}
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} else {
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nand_decode_ext_id(chip);
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if (nand_is_slc(chip)) {
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switch (chip->id.data[1]) {
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/* K9F4G08U0D-S[I|C]B0(T00) */
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case 0xDC:
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chip->ecc_step_ds = 512;
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chip->ecc_strength_ds = 1;
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break;
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/* K9F1G08U0E 21nm chips do not support subpage write */
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case 0xF1:
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if (chip->id.len > 4 &&
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(chip->id.data[4] & GENMASK(1, 0)) == 0x1)
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chip->options |= NAND_NO_SUBPAGE_WRITE;
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break;
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default:
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break;
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}
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}
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}
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}
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static int samsung_nand_init(struct nand_chip *chip)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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if (mtd->writesize > 512)
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chip->options |= NAND_SAMSUNG_LP_OPTIONS;
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if (!nand_is_slc(chip))
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chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
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else
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chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
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return 0;
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}
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const struct nand_manufacturer_ops samsung_nand_manuf_ops = {
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.detect = samsung_nand_decode_id,
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.init = samsung_nand_init,
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};
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