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Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 and DRA7x devices. DMM only requires address and irq information. Add documentation for the DMM bindings. Originally worked on by Andy Gross <andygro@gmail.com> Cc: Andy Gross <andygro@gmail.com> Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
23 lines
892 B
Plaintext
23 lines
892 B
Plaintext
OMAP Dynamic Memory Manager (DMM) bindings
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The dynamic memory manager (DMM) is a module located immediately in front of the
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SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of memory
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accesses such as priority generation amongst initiators, configuration of SDRAM
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interleaving, optimizing transfer of 2D block objects, and provide MMU-like page
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translation for initiators which need contiguous dma bus addresses.
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Required properties:
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- compatible: Should contain "ti,omap4-dmm" for OMAP4 family
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Should contain "ti,omap5-dmm" for OMAP5 and DRA7x family
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- reg: Contains DMM register address range (base address and length)
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- interrupts: Should contain an interrupt-specifier for DMM_IRQ.
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- ti,hwmods: Name of the hwmod associated to DMM, which is typically "dmm"
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Example:
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dmm@4e000000 {
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compatible = "ti,omap4-dmm";
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reg = <0x4e000000 0x800>;
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ti,hwmods = "dmm";
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};
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