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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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5bd2acdcdd
strobe-dll-delay-target is the delay cell add on the strobe line. Strobe line the the uSDHC loopback read clock which is use in HS400 mode. Different strobe-dll-delay-target may need to set for different board/SoC. If this delay cell is not set to an appropriate value, we may see some read operation meet CRC error after HS400 mode select which already pass the tuning. This patch add the strobe-dll-delay-target setting in driver, so that user can easily config this delay cell in dts file. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/1582100757-20683-1-git-send-email-haibo.chen@nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
43 lines
1.3 KiB
C
43 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright 2010 Wolfram Sang <w.sang@pengutronix.de>
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*/
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#ifndef __ASM_ARCH_IMX_ESDHC_H
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#define __ASM_ARCH_IMX_ESDHC_H
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#include <linux/types.h>
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enum wp_types {
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ESDHC_WP_NONE, /* no WP, neither controller nor gpio */
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ESDHC_WP_CONTROLLER, /* mmc controller internal WP */
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ESDHC_WP_GPIO, /* external gpio pin for WP */
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};
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enum cd_types {
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ESDHC_CD_NONE, /* no CD, neither controller nor gpio */
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ESDHC_CD_CONTROLLER, /* mmc controller internal CD */
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ESDHC_CD_GPIO, /* external gpio pin for CD */
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ESDHC_CD_PERMANENT, /* no CD, card permanently wired to host */
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};
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/**
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* struct esdhc_platform_data - platform data for esdhc on i.MX
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*
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* ESDHC_WP(CD)_CONTROLLER type is not available on i.MX25/35.
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*
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* @wp_type: type of write_protect method (see wp_types enum above)
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* @cd_type: type of card_detect method (see cd_types enum above)
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*/
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struct esdhc_platform_data {
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enum wp_types wp_type;
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enum cd_types cd_type;
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int max_bus_width;
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unsigned int delay_line;
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unsigned int tuning_step; /* The delay cell steps in tuning procedure */
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unsigned int tuning_start_tap; /* The start delay cell point in tuning procedure */
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unsigned int strobe_dll_delay_target; /* The delay cell for strobe pad (read clock) */
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};
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#endif /* __ASM_ARCH_IMX_ESDHC_H */
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