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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8b23281605
In debugging the failure of the glibc tst-cond18 test on parisc, I realized that futexes need to use the same locks the lws calls. This fixes all the pthread 'cond' tests. Sadly, there are still problems with thread cancellation. [jejb: checkpatch fixes] Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
155 lines
3.5 KiB
C
155 lines
3.5 KiB
C
#ifndef _ASM_PARISC_FUTEX_H
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#define _ASM_PARISC_FUTEX_H
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#ifdef __KERNEL__
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#include <linux/futex.h>
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#include <linux/uaccess.h>
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#include <asm/atomic.h>
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#include <asm/errno.h>
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/* The following has to match the LWS code in syscall.S. We have
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sixteen four-word locks. */
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static inline void
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_futex_spin_lock_irqsave(u32 __user *uaddr, unsigned long int *flags)
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{
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extern u32 lws_lock_start[];
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long index = ((long)uaddr & 0xf0) >> 2;
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arch_spinlock_t *s = (arch_spinlock_t *)&lws_lock_start[index];
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local_irq_save(*flags);
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arch_spin_lock(s);
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}
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static inline void
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_futex_spin_unlock_irqrestore(u32 __user *uaddr, unsigned long int *flags)
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{
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extern u32 lws_lock_start[];
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long index = ((long)uaddr & 0xf0) >> 2;
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arch_spinlock_t *s = (arch_spinlock_t *)&lws_lock_start[index];
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arch_spin_unlock(s);
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local_irq_restore(*flags);
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}
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static inline int
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futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
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{
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unsigned long int flags;
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u32 val;
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int op = (encoded_op >> 28) & 7;
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int cmp = (encoded_op >> 24) & 15;
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int oparg = (encoded_op << 8) >> 20;
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int cmparg = (encoded_op << 20) >> 20;
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int oldval = 0, ret;
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if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
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oparg = 1 << oparg;
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(*uaddr)))
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return -EFAULT;
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pagefault_disable();
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_futex_spin_lock_irqsave(uaddr, &flags);
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switch (op) {
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case FUTEX_OP_SET:
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/* *(int *)UADDR2 = OPARG; */
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ret = get_user(oldval, uaddr);
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if (!ret)
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ret = put_user(oparg, uaddr);
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break;
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case FUTEX_OP_ADD:
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/* *(int *)UADDR2 += OPARG; */
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ret = get_user(oldval, uaddr);
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if (!ret) {
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val = oldval + oparg;
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ret = put_user(val, uaddr);
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}
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break;
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case FUTEX_OP_OR:
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/* *(int *)UADDR2 |= OPARG; */
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ret = get_user(oldval, uaddr);
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if (!ret) {
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val = oldval | oparg;
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ret = put_user(val, uaddr);
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}
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break;
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case FUTEX_OP_ANDN:
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/* *(int *)UADDR2 &= ~OPARG; */
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ret = get_user(oldval, uaddr);
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if (!ret) {
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val = oldval & ~oparg;
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ret = put_user(val, uaddr);
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}
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break;
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case FUTEX_OP_XOR:
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/* *(int *)UADDR2 ^= OPARG; */
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ret = get_user(oldval, uaddr);
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if (!ret) {
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val = oldval ^ oparg;
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ret = put_user(val, uaddr);
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}
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break;
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default:
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ret = -ENOSYS;
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}
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_futex_spin_unlock_irqrestore(uaddr, &flags);
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pagefault_enable();
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if (!ret) {
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switch (cmp) {
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case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
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case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
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case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
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case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
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case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
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case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
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default: ret = -ENOSYS;
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}
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}
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return ret;
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}
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/* Non-atomic version */
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static inline int
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futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
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u32 oldval, u32 newval)
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{
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int ret;
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u32 val;
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unsigned long flags;
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/* futex.c wants to do a cmpxchg_inatomic on kernel NULL, which is
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* our gateway page, and causes no end of trouble...
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*/
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if (segment_eq(KERNEL_DS, get_fs()) && !uaddr)
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return -EFAULT;
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
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return -EFAULT;
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/* HPPA has no cmpxchg in hardware and therefore the
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* best we can do here is use an array of locks. The
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* lock selected is based on a hash of the userspace
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* address. This should scale to a couple of CPUs.
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*/
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_futex_spin_lock_irqsave(uaddr, &flags);
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ret = get_user(val, uaddr);
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if (!ret && val == oldval)
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ret = put_user(newval, uaddr);
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*uval = val;
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_futex_spin_unlock_irqrestore(uaddr, &flags);
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return ret;
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}
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#endif /*__KERNEL__*/
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#endif /*_ASM_PARISC_FUTEX_H*/
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