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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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25985edced
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
627 lines
16 KiB
C
627 lines
16 KiB
C
/*
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* Freescale QUICC Engine USB Host Controller Driver
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*
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* Copyright (c) Freescale Semicondutor, Inc. 2006.
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* Shlomi Gridish <gridish@freescale.com>
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* Jerry Huang <Chang-Ming.Huang@freescale.com>
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* Copyright (c) Logic Product Development, Inc. 2007
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* Peter Barada <peterb@logicpd.com>
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* Copyright (c) MontaVista Software, Inc. 2008.
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* Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/io.h>
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#include <linux/usb.h>
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#include <linux/usb/hcd.h>
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#include "fhci.h"
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#define DUMMY_BD_BUFFER 0xdeadbeef
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#define DUMMY2_BD_BUFFER 0xbaadf00d
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/* Transaction Descriptors bits */
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#define TD_R 0x8000 /* ready bit */
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#define TD_W 0x2000 /* wrap bit */
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#define TD_I 0x1000 /* interrupt on completion */
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#define TD_L 0x0800 /* last */
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#define TD_TC 0x0400 /* transmit CRC */
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#define TD_CNF 0x0200 /* CNF - Must be always 1 */
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#define TD_LSP 0x0100 /* Low-speed transaction */
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#define TD_PID 0x00c0 /* packet id */
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#define TD_RXER 0x0020 /* Rx error or not */
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#define TD_NAK 0x0010 /* No ack. */
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#define TD_STAL 0x0008 /* Stall received */
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#define TD_TO 0x0004 /* time out */
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#define TD_UN 0x0002 /* underrun */
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#define TD_NO 0x0010 /* Rx Non Octet Aligned Packet */
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#define TD_AB 0x0008 /* Frame Aborted */
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#define TD_CR 0x0004 /* CRC Error */
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#define TD_OV 0x0002 /* Overrun */
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#define TD_BOV 0x0001 /* Buffer Overrun */
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#define TD_ERRORS (TD_NAK | TD_STAL | TD_TO | TD_UN | \
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TD_NO | TD_AB | TD_CR | TD_OV | TD_BOV)
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#define TD_PID_DATA0 0x0080 /* Data 0 toggle */
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#define TD_PID_DATA1 0x00c0 /* Data 1 toggle */
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#define TD_PID_TOGGLE 0x00c0 /* Data 0/1 toggle mask */
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#define TD_TOK_SETUP 0x0000
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#define TD_TOK_OUT 0x4000
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#define TD_TOK_IN 0x8000
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#define TD_ISO 0x1000
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#define TD_ENDP 0x0780
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#define TD_ADDR 0x007f
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#define TD_ENDP_SHIFT 7
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struct usb_td {
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__be16 status;
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__be16 length;
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__be32 buf_ptr;
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__be16 extra;
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__be16 reserved;
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};
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static struct usb_td __iomem *next_bd(struct usb_td __iomem *base,
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struct usb_td __iomem *td,
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u16 status)
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{
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if (status & TD_W)
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return base;
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else
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return ++td;
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}
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void fhci_push_dummy_bd(struct endpoint *ep)
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{
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if (ep->already_pushed_dummy_bd == false) {
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u16 td_status = in_be16(&ep->empty_td->status);
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out_be32(&ep->empty_td->buf_ptr, DUMMY_BD_BUFFER);
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/* get the next TD in the ring */
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ep->empty_td = next_bd(ep->td_base, ep->empty_td, td_status);
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ep->already_pushed_dummy_bd = true;
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}
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}
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/* destroy an USB endpoint */
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void fhci_ep0_free(struct fhci_usb *usb)
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{
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struct endpoint *ep;
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int size;
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ep = usb->ep0;
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if (ep) {
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if (ep->td_base)
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cpm_muram_free(cpm_muram_offset(ep->td_base));
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if (kfifo_initialized(&ep->conf_frame_Q)) {
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size = cq_howmany(&ep->conf_frame_Q);
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for (; size; size--) {
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struct packet *pkt = cq_get(&ep->conf_frame_Q);
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kfree(pkt);
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}
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cq_delete(&ep->conf_frame_Q);
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}
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if (kfifo_initialized(&ep->empty_frame_Q)) {
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size = cq_howmany(&ep->empty_frame_Q);
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for (; size; size--) {
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struct packet *pkt = cq_get(&ep->empty_frame_Q);
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kfree(pkt);
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}
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cq_delete(&ep->empty_frame_Q);
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}
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if (kfifo_initialized(&ep->dummy_packets_Q)) {
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size = cq_howmany(&ep->dummy_packets_Q);
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for (; size; size--) {
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u8 *buff = cq_get(&ep->dummy_packets_Q);
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kfree(buff);
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}
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cq_delete(&ep->dummy_packets_Q);
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}
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kfree(ep);
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usb->ep0 = NULL;
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}
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}
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/*
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* create the endpoint structure
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*
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* arguments:
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* usb A pointer to the data structure of the USB
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* data_mem The data memory partition(BUS)
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* ring_len TD ring length
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*/
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u32 fhci_create_ep(struct fhci_usb *usb, enum fhci_mem_alloc data_mem,
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u32 ring_len)
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{
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struct endpoint *ep;
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struct usb_td __iomem *td;
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unsigned long ep_offset;
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char *err_for = "enpoint PRAM";
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int ep_mem_size;
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u32 i;
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/* we need at least 3 TDs in the ring */
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if (!(ring_len > 2)) {
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fhci_err(usb->fhci, "illegal TD ring length parameters\n");
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return -EINVAL;
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}
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ep = kzalloc(sizeof(*ep), GFP_KERNEL);
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if (!ep)
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return -ENOMEM;
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ep_mem_size = ring_len * sizeof(*td) + sizeof(struct fhci_ep_pram);
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ep_offset = cpm_muram_alloc(ep_mem_size, 32);
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if (IS_ERR_VALUE(ep_offset))
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goto err;
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ep->td_base = cpm_muram_addr(ep_offset);
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/* zero all queue pointers */
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if (cq_new(&ep->conf_frame_Q, ring_len + 2) ||
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cq_new(&ep->empty_frame_Q, ring_len + 2) ||
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cq_new(&ep->dummy_packets_Q, ring_len + 2)) {
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err_for = "frame_queues";
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goto err;
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}
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for (i = 0; i < (ring_len + 1); i++) {
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struct packet *pkt;
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u8 *buff;
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pkt = kmalloc(sizeof(*pkt), GFP_KERNEL);
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if (!pkt) {
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err_for = "frame";
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goto err;
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}
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buff = kmalloc(1028 * sizeof(*buff), GFP_KERNEL);
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if (!buff) {
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kfree(pkt);
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err_for = "buffer";
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goto err;
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}
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cq_put(&ep->empty_frame_Q, pkt);
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cq_put(&ep->dummy_packets_Q, buff);
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}
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/* we put the endpoint parameter RAM right behind the TD ring */
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ep->ep_pram_ptr = (void __iomem *)ep->td_base + sizeof(*td) * ring_len;
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ep->conf_td = ep->td_base;
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ep->empty_td = ep->td_base;
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ep->already_pushed_dummy_bd = false;
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/* initialize tds */
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td = ep->td_base;
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for (i = 0; i < ring_len; i++) {
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out_be32(&td->buf_ptr, 0);
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out_be16(&td->status, 0);
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out_be16(&td->length, 0);
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out_be16(&td->extra, 0);
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td++;
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}
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td--;
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out_be16(&td->status, TD_W); /* for last TD set Wrap bit */
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out_be16(&td->length, 0);
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/* endpoint structure has been created */
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usb->ep0 = ep;
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return 0;
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err:
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fhci_ep0_free(usb);
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kfree(ep);
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fhci_err(usb->fhci, "no memory for the %s\n", err_for);
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return -ENOMEM;
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}
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/*
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* initialize the endpoint register according to the given parameters
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*
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* artuments:
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* usb A pointer to the data strucutre of the USB
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* ep A pointer to the endpoint structre
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* data_mem The data memory partition(BUS)
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*/
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void fhci_init_ep_registers(struct fhci_usb *usb, struct endpoint *ep,
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enum fhci_mem_alloc data_mem)
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{
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u8 rt;
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/* set the endpoint registers according to the endpoint */
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out_be16(&usb->fhci->regs->usb_ep[0],
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USB_TRANS_CTR | USB_EP_MF | USB_EP_RTE);
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out_be16(&usb->fhci->pram->ep_ptr[0],
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cpm_muram_offset(ep->ep_pram_ptr));
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rt = (BUS_MODE_BO_BE | BUS_MODE_GBL);
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#ifdef MULTI_DATA_BUS
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if (data_mem == MEM_SECONDARY)
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rt |= BUS_MODE_DTB;
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#endif
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out_8(&ep->ep_pram_ptr->rx_func_code, rt);
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out_8(&ep->ep_pram_ptr->tx_func_code, rt);
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out_be16(&ep->ep_pram_ptr->rx_buff_len, 1028);
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out_be16(&ep->ep_pram_ptr->rx_base, 0);
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out_be16(&ep->ep_pram_ptr->tx_base, cpm_muram_offset(ep->td_base));
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out_be16(&ep->ep_pram_ptr->rx_bd_ptr, 0);
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out_be16(&ep->ep_pram_ptr->tx_bd_ptr, cpm_muram_offset(ep->td_base));
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out_be32(&ep->ep_pram_ptr->tx_state, 0);
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}
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/*
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* Collect the submitted frames and inform the application about them
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* It is also preparing the TDs for new frames. If the Tx interrupts
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* are disabled, the application should call that routine to get
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* confirmation about the submitted frames. Otherwise, the routine is
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* called from the interrupt service routine during the Tx interrupt.
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* In that case the application is informed by calling the application
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* specific 'fhci_transaction_confirm' routine
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*/
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static void fhci_td_transaction_confirm(struct fhci_usb *usb)
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{
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struct endpoint *ep = usb->ep0;
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struct packet *pkt;
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struct usb_td __iomem *td;
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u16 extra_data;
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u16 td_status;
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u16 td_length;
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u32 buf;
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/*
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* collect transmitted BDs from the chip. The routine clears all BDs
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* with R bit = 0 and the pointer to data buffer is not NULL, that is
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* BDs which point to the transmitted data buffer
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*/
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while (1) {
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td = ep->conf_td;
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td_status = in_be16(&td->status);
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td_length = in_be16(&td->length);
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buf = in_be32(&td->buf_ptr);
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extra_data = in_be16(&td->extra);
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/* check if the TD is empty */
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if (!(!(td_status & TD_R) && ((td_status & ~TD_W) || buf)))
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break;
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/* check if it is a dummy buffer */
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else if ((buf == DUMMY_BD_BUFFER) && !(td_status & ~TD_W))
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break;
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/* mark TD as empty */
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clrbits16(&td->status, ~TD_W);
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out_be16(&td->length, 0);
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out_be32(&td->buf_ptr, 0);
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out_be16(&td->extra, 0);
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/* advance the TD pointer */
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ep->conf_td = next_bd(ep->td_base, ep->conf_td, td_status);
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/* check if it is a dummy buffer(type2) */
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if ((buf == DUMMY2_BD_BUFFER) && !(td_status & ~TD_W))
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continue;
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pkt = cq_get(&ep->conf_frame_Q);
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if (!pkt)
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fhci_err(usb->fhci, "no frame to confirm\n");
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if (td_status & TD_ERRORS) {
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if (td_status & TD_RXER) {
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if (td_status & TD_CR)
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pkt->status = USB_TD_RX_ER_CRC;
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else if (td_status & TD_AB)
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pkt->status = USB_TD_RX_ER_BITSTUFF;
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else if (td_status & TD_OV)
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pkt->status = USB_TD_RX_ER_OVERUN;
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else if (td_status & TD_BOV)
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pkt->status = USB_TD_RX_DATA_OVERUN;
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else if (td_status & TD_NO)
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pkt->status = USB_TD_RX_ER_NONOCT;
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else
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fhci_err(usb->fhci, "illegal error "
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"occurred\n");
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} else if (td_status & TD_NAK)
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pkt->status = USB_TD_TX_ER_NAK;
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else if (td_status & TD_TO)
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pkt->status = USB_TD_TX_ER_TIMEOUT;
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else if (td_status & TD_UN)
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pkt->status = USB_TD_TX_ER_UNDERUN;
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else if (td_status & TD_STAL)
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pkt->status = USB_TD_TX_ER_STALL;
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else
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fhci_err(usb->fhci, "illegal error occurred\n");
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} else if ((extra_data & TD_TOK_IN) &&
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pkt->len > td_length - CRC_SIZE) {
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pkt->status = USB_TD_RX_DATA_UNDERUN;
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}
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if (extra_data & TD_TOK_IN)
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pkt->len = td_length - CRC_SIZE;
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else if (pkt->info & PKT_ZLP)
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pkt->len = 0;
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else
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pkt->len = td_length;
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fhci_transaction_confirm(usb, pkt);
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}
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}
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/*
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* Submitting a data frame to a specified endpoint of a USB device
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* The frame is put in the driver's transmit queue for this endpoint
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*
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* Arguments:
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* usb A pointer to the USB structure
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* pkt A pointer to the user frame structure
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* trans_type Transaction tyep - IN,OUT or SETUP
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* dest_addr Device address - 0~127
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* dest_ep Endpoint number of the device - 0~16
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* trans_mode Pipe type - ISO,Interrupt,bulk or control
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* dest_speed USB speed - Low speed or FULL speed
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* data_toggle Data sequence toggle - 0 or 1
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*/
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u32 fhci_host_transaction(struct fhci_usb *usb,
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struct packet *pkt,
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enum fhci_ta_type trans_type,
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u8 dest_addr,
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u8 dest_ep,
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enum fhci_tf_mode trans_mode,
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enum fhci_speed dest_speed, u8 data_toggle)
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{
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struct endpoint *ep = usb->ep0;
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struct usb_td __iomem *td;
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u16 extra_data;
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u16 td_status;
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fhci_usb_disable_interrupt(usb);
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/* start from the next BD that should be filled */
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td = ep->empty_td;
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td_status = in_be16(&td->status);
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if (td_status & TD_R && in_be16(&td->length)) {
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/* if the TD is not free */
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fhci_usb_enable_interrupt(usb);
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return -1;
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}
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/* get the next TD in the ring */
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ep->empty_td = next_bd(ep->td_base, ep->empty_td, td_status);
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fhci_usb_enable_interrupt(usb);
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pkt->priv_data = td;
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out_be32(&td->buf_ptr, virt_to_phys(pkt->data));
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/* sets up transaction parameters - addr,endp,dir,and type */
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extra_data = (dest_ep << TD_ENDP_SHIFT) | dest_addr;
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switch (trans_type) {
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case FHCI_TA_IN:
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extra_data |= TD_TOK_IN;
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break;
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case FHCI_TA_OUT:
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extra_data |= TD_TOK_OUT;
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break;
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case FHCI_TA_SETUP:
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extra_data |= TD_TOK_SETUP;
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break;
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}
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if (trans_mode == FHCI_TF_ISO)
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extra_data |= TD_ISO;
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out_be16(&td->extra, extra_data);
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/* sets up the buffer descriptor */
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td_status = ((td_status & TD_W) | TD_R | TD_L | TD_I | TD_CNF);
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if (!(pkt->info & PKT_NO_CRC))
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td_status |= TD_TC;
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switch (trans_type) {
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case FHCI_TA_IN:
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if (data_toggle)
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pkt->info |= PKT_PID_DATA1;
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else
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pkt->info |= PKT_PID_DATA0;
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break;
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default:
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if (data_toggle) {
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td_status |= TD_PID_DATA1;
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pkt->info |= PKT_PID_DATA1;
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} else {
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td_status |= TD_PID_DATA0;
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pkt->info |= PKT_PID_DATA0;
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}
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break;
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}
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if ((dest_speed == FHCI_LOW_SPEED) &&
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(usb->port_status == FHCI_PORT_FULL))
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td_status |= TD_LSP;
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out_be16(&td->status, td_status);
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/* set up buffer length */
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if (trans_type == FHCI_TA_IN)
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out_be16(&td->length, pkt->len + CRC_SIZE);
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else
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out_be16(&td->length, pkt->len);
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/* put the frame to the confirmation queue */
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cq_put(&ep->conf_frame_Q, pkt);
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if (cq_howmany(&ep->conf_frame_Q) == 1)
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out_8(&usb->fhci->regs->usb_comm, USB_CMD_STR_FIFO);
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return 0;
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}
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/* Reset the Tx BD ring */
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void fhci_flush_bds(struct fhci_usb *usb)
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{
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u16 extra_data;
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u16 td_status;
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u32 buf;
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struct usb_td __iomem *td;
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struct endpoint *ep = usb->ep0;
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td = ep->td_base;
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while (1) {
|
|
td_status = in_be16(&td->status);
|
|
buf = in_be32(&td->buf_ptr);
|
|
extra_data = in_be16(&td->extra);
|
|
|
|
/* if the TD is not empty - we'll confirm it as Timeout */
|
|
if (td_status & TD_R)
|
|
out_be16(&td->status, (td_status & ~TD_R) | TD_TO);
|
|
/* if this TD is dummy - let's skip this TD */
|
|
else if (in_be32(&td->buf_ptr) == DUMMY_BD_BUFFER)
|
|
out_be32(&td->buf_ptr, DUMMY2_BD_BUFFER);
|
|
/* if this is the last TD - break */
|
|
if (td_status & TD_W)
|
|
break;
|
|
|
|
td++;
|
|
}
|
|
|
|
fhci_td_transaction_confirm(usb);
|
|
|
|
td = ep->td_base;
|
|
do {
|
|
out_be16(&td->status, 0);
|
|
out_be16(&td->length, 0);
|
|
out_be32(&td->buf_ptr, 0);
|
|
out_be16(&td->extra, 0);
|
|
td++;
|
|
} while (!(in_be16(&td->status) & TD_W));
|
|
out_be16(&td->status, TD_W); /* for last TD set Wrap bit */
|
|
out_be16(&td->length, 0);
|
|
out_be32(&td->buf_ptr, 0);
|
|
out_be16(&td->extra, 0);
|
|
|
|
out_be16(&ep->ep_pram_ptr->tx_bd_ptr,
|
|
in_be16(&ep->ep_pram_ptr->tx_base));
|
|
out_be32(&ep->ep_pram_ptr->tx_state, 0);
|
|
out_be16(&ep->ep_pram_ptr->tx_cnt, 0);
|
|
ep->empty_td = ep->td_base;
|
|
ep->conf_td = ep->td_base;
|
|
}
|
|
|
|
/*
|
|
* Flush all transmitted packets from TDs in the actual frame.
|
|
* This routine is called when something wrong with the controller and
|
|
* we want to get rid of the actual frame and start again next frame
|
|
*/
|
|
void fhci_flush_actual_frame(struct fhci_usb *usb)
|
|
{
|
|
u8 mode;
|
|
u16 tb_ptr;
|
|
u16 extra_data;
|
|
u16 td_status;
|
|
u32 buf_ptr;
|
|
struct usb_td __iomem *td;
|
|
struct endpoint *ep = usb->ep0;
|
|
|
|
/* disable the USB controller */
|
|
mode = in_8(&usb->fhci->regs->usb_mod);
|
|
out_8(&usb->fhci->regs->usb_mod, mode & ~USB_MODE_EN);
|
|
|
|
tb_ptr = in_be16(&ep->ep_pram_ptr->tx_bd_ptr);
|
|
td = cpm_muram_addr(tb_ptr);
|
|
td_status = in_be16(&td->status);
|
|
buf_ptr = in_be32(&td->buf_ptr);
|
|
extra_data = in_be16(&td->extra);
|
|
do {
|
|
if (td_status & TD_R) {
|
|
out_be16(&td->status, (td_status & ~TD_R) | TD_TO);
|
|
} else {
|
|
out_be32(&td->buf_ptr, 0);
|
|
ep->already_pushed_dummy_bd = false;
|
|
break;
|
|
}
|
|
|
|
/* advance the TD pointer */
|
|
td = next_bd(ep->td_base, td, td_status);
|
|
td_status = in_be16(&td->status);
|
|
buf_ptr = in_be32(&td->buf_ptr);
|
|
extra_data = in_be16(&td->extra);
|
|
} while ((td_status & TD_R) || buf_ptr);
|
|
|
|
fhci_td_transaction_confirm(usb);
|
|
|
|
out_be16(&ep->ep_pram_ptr->tx_bd_ptr,
|
|
in_be16(&ep->ep_pram_ptr->tx_base));
|
|
out_be32(&ep->ep_pram_ptr->tx_state, 0);
|
|
out_be16(&ep->ep_pram_ptr->tx_cnt, 0);
|
|
ep->empty_td = ep->td_base;
|
|
ep->conf_td = ep->td_base;
|
|
|
|
usb->actual_frame->frame_status = FRAME_TIMER_END_TRANSMISSION;
|
|
|
|
/* reset the event register */
|
|
out_be16(&usb->fhci->regs->usb_event, 0xffff);
|
|
/* enable the USB controller */
|
|
out_8(&usb->fhci->regs->usb_mod, mode | USB_MODE_EN);
|
|
}
|
|
|
|
/* handles Tx confirm and Tx error interrupt */
|
|
void fhci_tx_conf_interrupt(struct fhci_usb *usb)
|
|
{
|
|
fhci_td_transaction_confirm(usb);
|
|
|
|
/*
|
|
* Schedule another transaction to this frame only if we have
|
|
* already confirmed all transaction in the frame.
|
|
*/
|
|
if (((fhci_get_sof_timer_count(usb) < usb->max_frame_usage) ||
|
|
(usb->actual_frame->frame_status & FRAME_END_TRANSMISSION)) &&
|
|
(list_empty(&usb->actual_frame->tds_list)))
|
|
fhci_schedule_transactions(usb);
|
|
}
|
|
|
|
void fhci_host_transmit_actual_frame(struct fhci_usb *usb)
|
|
{
|
|
u16 tb_ptr;
|
|
u16 td_status;
|
|
struct usb_td __iomem *td;
|
|
struct endpoint *ep = usb->ep0;
|
|
|
|
tb_ptr = in_be16(&ep->ep_pram_ptr->tx_bd_ptr);
|
|
td = cpm_muram_addr(tb_ptr);
|
|
|
|
if (in_be32(&td->buf_ptr) == DUMMY_BD_BUFFER) {
|
|
struct usb_td __iomem *old_td = td;
|
|
|
|
ep->already_pushed_dummy_bd = false;
|
|
td_status = in_be16(&td->status);
|
|
/* gets the next TD in the ring */
|
|
td = next_bd(ep->td_base, td, td_status);
|
|
tb_ptr = cpm_muram_offset(td);
|
|
out_be16(&ep->ep_pram_ptr->tx_bd_ptr, tb_ptr);
|
|
|
|
/* start transmit only if we have something in the TDs */
|
|
if (in_be16(&td->status) & TD_R)
|
|
out_8(&usb->fhci->regs->usb_comm, USB_CMD_STR_FIFO);
|
|
|
|
if (in_be32(&ep->conf_td->buf_ptr) == DUMMY_BD_BUFFER) {
|
|
out_be32(&old_td->buf_ptr, 0);
|
|
ep->conf_td = next_bd(ep->td_base, ep->conf_td,
|
|
td_status);
|
|
} else {
|
|
out_be32(&old_td->buf_ptr, DUMMY2_BD_BUFFER);
|
|
}
|
|
}
|
|
}
|