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26a2056eb2
When removing prom.h include by of.h, several OF headers will no longer be implicitly included. Add explicit includes of of_*.h as needed. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@linaro.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Anatolij Gustschin <agust@denx.de> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Olof Johansson <olof@lixom.net> Cc: linuxppc-dev@lists.ozlabs.org
256 lines
5.4 KiB
C
256 lines
5.4 KiB
C
/*
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* arch/powerpc/platforms/embedded6xx/flipper-pic.c
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*
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* Nintendo GameCube/Wii "Flipper" interrupt controller support.
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* Copyright (C) 2004-2009 The GameCube Linux Team
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* Copyright (C) 2007,2008,2009 Albert Herranz
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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*/
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#define DRV_MODULE_NAME "flipper-pic"
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#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/io.h>
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#include "flipper-pic.h"
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#define FLIPPER_NR_IRQS 32
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/*
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* Each interrupt has a corresponding bit in both
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* the Interrupt Cause (ICR) and Interrupt Mask (IMR) registers.
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*
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* Enabling/disabling an interrupt line involves setting/clearing
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* the corresponding bit in IMR.
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* Except for the RSW interrupt, all interrupts get deasserted automatically
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* when the source deasserts the interrupt.
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*/
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#define FLIPPER_ICR 0x00
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#define FLIPPER_ICR_RSS (1<<16) /* reset switch state */
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#define FLIPPER_IMR 0x04
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#define FLIPPER_RESET 0x24
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/*
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* IRQ chip hooks.
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*
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*/
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static void flipper_pic_mask_and_ack(struct irq_data *d)
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{
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int irq = irqd_to_hwirq(d);
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void __iomem *io_base = irq_data_get_irq_chip_data(d);
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u32 mask = 1 << irq;
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clrbits32(io_base + FLIPPER_IMR, mask);
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/* this is at least needed for RSW */
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out_be32(io_base + FLIPPER_ICR, mask);
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}
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static void flipper_pic_ack(struct irq_data *d)
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{
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int irq = irqd_to_hwirq(d);
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void __iomem *io_base = irq_data_get_irq_chip_data(d);
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/* this is at least needed for RSW */
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out_be32(io_base + FLIPPER_ICR, 1 << irq);
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}
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static void flipper_pic_mask(struct irq_data *d)
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{
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int irq = irqd_to_hwirq(d);
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void __iomem *io_base = irq_data_get_irq_chip_data(d);
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clrbits32(io_base + FLIPPER_IMR, 1 << irq);
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}
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static void flipper_pic_unmask(struct irq_data *d)
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{
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int irq = irqd_to_hwirq(d);
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void __iomem *io_base = irq_data_get_irq_chip_data(d);
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setbits32(io_base + FLIPPER_IMR, 1 << irq);
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}
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static struct irq_chip flipper_pic = {
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.name = "flipper-pic",
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.irq_ack = flipper_pic_ack,
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.irq_mask_ack = flipper_pic_mask_and_ack,
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.irq_mask = flipper_pic_mask,
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.irq_unmask = flipper_pic_unmask,
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};
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/*
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* IRQ host hooks.
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*
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*/
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static struct irq_domain *flipper_irq_host;
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static int flipper_pic_map(struct irq_domain *h, unsigned int virq,
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irq_hw_number_t hwirq)
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{
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irq_set_chip_data(virq, h->host_data);
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irq_set_status_flags(virq, IRQ_LEVEL);
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irq_set_chip_and_handler(virq, &flipper_pic, handle_level_irq);
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return 0;
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}
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static int flipper_pic_match(struct irq_domain *h, struct device_node *np)
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{
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return 1;
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}
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static const struct irq_domain_ops flipper_irq_domain_ops = {
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.map = flipper_pic_map,
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.match = flipper_pic_match,
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};
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/*
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* Platform hooks.
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*
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*/
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static void __flipper_quiesce(void __iomem *io_base)
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{
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/* mask and ack all IRQs */
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out_be32(io_base + FLIPPER_IMR, 0x00000000);
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out_be32(io_base + FLIPPER_ICR, 0xffffffff);
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}
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struct irq_domain * __init flipper_pic_init(struct device_node *np)
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{
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struct device_node *pi;
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struct irq_domain *irq_domain = NULL;
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struct resource res;
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void __iomem *io_base;
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int retval;
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pi = of_get_parent(np);
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if (!pi) {
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pr_err("no parent found\n");
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goto out;
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}
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if (!of_device_is_compatible(pi, "nintendo,flipper-pi")) {
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pr_err("unexpected parent compatible\n");
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goto out;
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}
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retval = of_address_to_resource(pi, 0, &res);
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if (retval) {
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pr_err("no io memory range found\n");
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goto out;
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}
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io_base = ioremap(res.start, resource_size(&res));
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pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base);
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__flipper_quiesce(io_base);
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irq_domain = irq_domain_add_linear(np, FLIPPER_NR_IRQS,
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&flipper_irq_domain_ops, io_base);
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if (!irq_domain) {
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pr_err("failed to allocate irq_domain\n");
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return NULL;
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}
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out:
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return irq_domain;
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}
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unsigned int flipper_pic_get_irq(void)
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{
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void __iomem *io_base = flipper_irq_host->host_data;
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int irq;
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u32 irq_status;
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irq_status = in_be32(io_base + FLIPPER_ICR) &
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in_be32(io_base + FLIPPER_IMR);
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if (irq_status == 0)
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return NO_IRQ; /* no more IRQs pending */
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irq = __ffs(irq_status);
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return irq_linear_revmap(flipper_irq_host, irq);
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}
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/*
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* Probe function.
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*
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*/
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void __init flipper_pic_probe(void)
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{
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struct device_node *np;
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np = of_find_compatible_node(NULL, NULL, "nintendo,flipper-pic");
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BUG_ON(!np);
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flipper_irq_host = flipper_pic_init(np);
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BUG_ON(!flipper_irq_host);
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irq_set_default_host(flipper_irq_host);
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of_node_put(np);
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}
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/*
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* Misc functions related to the flipper chipset.
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*
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*/
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/**
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* flipper_quiesce() - quiesce flipper irq controller
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*
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* Mask and ack all interrupt sources.
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*
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*/
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void flipper_quiesce(void)
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{
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void __iomem *io_base = flipper_irq_host->host_data;
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__flipper_quiesce(io_base);
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}
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/*
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* Resets the platform.
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*/
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void flipper_platform_reset(void)
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{
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void __iomem *io_base;
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if (flipper_irq_host && flipper_irq_host->host_data) {
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io_base = flipper_irq_host->host_data;
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out_8(io_base + FLIPPER_RESET, 0x00);
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}
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}
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/*
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* Returns non-zero if the reset button is pressed.
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*/
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int flipper_is_reset_button_pressed(void)
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{
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void __iomem *io_base;
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u32 icr;
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if (flipper_irq_host && flipper_irq_host->host_data) {
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io_base = flipper_irq_host->host_data;
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icr = in_be32(io_base + FLIPPER_ICR);
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return !(icr & FLIPPER_ICR_RSS);
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}
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return 0;
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}
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