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aa24886e37
On at least ARM (and I'm told MIPS too) dma_free_coherent() has a newish call context requirement: unlike its dma_alloc_coherent() sibling, it may not be called with IRQs disabled. (This was new behavior on ARM as of late 2005, caused by ARM SMP updates.) This little surprise can be annoyingly driver-visible. Since it looks like that restriction won't be removed, this patch changes the definition of the API to include that requirement. Also, to help catch nonportable drivers, it updates the x86 and swiotlb versions to include the relevant warnings. (I already observed that it trips on the bus_reset_tasklet of the new firewire_ohci driver.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Cc: David Miller <davem@davemloft.net> Acked-by: Russell King <rmk@arm.linux.org.uk> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
550 lines
21 KiB
Plaintext
550 lines
21 KiB
Plaintext
Dynamic DMA mapping using the generic device
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============================================
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James E.J. Bottomley <James.Bottomley@HansenPartnership.com>
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This document describes the DMA API. For a more gentle introduction
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phrased in terms of the pci_ equivalents (and actual examples) see
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DMA-mapping.txt
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This API is split into two pieces. Part I describes the API and the
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corresponding pci_ API. Part II describes the extensions to the API
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for supporting non-consistent memory machines. Unless you know that
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your driver absolutely has to support non-consistent platforms (this
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is usually only legacy platforms) you should only use the API
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described in part I.
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Part I - pci_ and dma_ Equivalent API
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-------------------------------------
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To get the pci_ API, you must #include <linux/pci.h>
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To get the dma_ API, you must #include <linux/dma-mapping.h>
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Part Ia - Using large dma-coherent buffers
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------------------------------------------
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void *
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dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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void *
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pci_alloc_consistent(struct pci_dev *dev, size_t size,
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dma_addr_t *dma_handle)
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Consistent memory is memory for which a write by either the device or
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the processor can immediately be read by the processor or device
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without having to worry about caching effects. (You may however need
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to make sure to flush the processor's write buffers before telling
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devices to read that memory.)
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This routine allocates a region of <size> bytes of consistent memory.
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It also returns a <dma_handle> which may be cast to an unsigned
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integer the same width as the bus and used as the physical address
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base of the region.
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Returns: a pointer to the allocated region (in the processor's virtual
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address space) or NULL if the allocation failed.
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Note: consistent memory can be expensive on some platforms, and the
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minimum allocation length may be as big as a page, so you should
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consolidate your requests for consistent memory as much as possible.
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The simplest way to do that is to use the dma_pool calls (see below).
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The flag parameter (dma_alloc_coherent only) allows the caller to
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specify the GFP_ flags (see kmalloc) for the allocation (the
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implementation may choose to ignore flags that affect the location of
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the returned memory, like GFP_DMA). For pci_alloc_consistent, you
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must assume GFP_ATOMIC behaviour.
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void
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dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_handle)
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void
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pci_free_consistent(struct pci_dev *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_handle)
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Free the region of consistent memory you previously allocated. dev,
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size and dma_handle must all be the same as those passed into the
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consistent allocate. cpu_addr must be the virtual address returned by
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the consistent allocate.
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Note that unlike their sibling allocation calls, these routines
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may only be called with IRQs enabled.
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Part Ib - Using small dma-coherent buffers
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------------------------------------------
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To get this part of the dma_ API, you must #include <linux/dmapool.h>
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Many drivers need lots of small dma-coherent memory regions for DMA
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descriptors or I/O buffers. Rather than allocating in units of a page
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or more using dma_alloc_coherent(), you can use DMA pools. These work
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much like a struct kmem_cache, except that they use the dma-coherent allocator,
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not __get_free_pages(). Also, they understand common hardware constraints
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for alignment, like queue heads needing to be aligned on N-byte boundaries.
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struct dma_pool *
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dma_pool_create(const char *name, struct device *dev,
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size_t size, size_t align, size_t alloc);
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struct pci_pool *
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pci_pool_create(const char *name, struct pci_device *dev,
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size_t size, size_t align, size_t alloc);
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The pool create() routines initialize a pool of dma-coherent buffers
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for use with a given device. It must be called in a context which
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can sleep.
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The "name" is for diagnostics (like a struct kmem_cache name); dev and size
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are like what you'd pass to dma_alloc_coherent(). The device's hardware
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alignment requirement for this type of data is "align" (which is expressed
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in bytes, and must be a power of two). If your device has no boundary
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crossing restrictions, pass 0 for alloc; passing 4096 says memory allocated
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from this pool must not cross 4KByte boundaries.
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void *dma_pool_alloc(struct dma_pool *pool, gfp_t gfp_flags,
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dma_addr_t *dma_handle);
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void *pci_pool_alloc(struct pci_pool *pool, gfp_t gfp_flags,
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dma_addr_t *dma_handle);
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This allocates memory from the pool; the returned memory will meet the size
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and alignment requirements specified at creation time. Pass GFP_ATOMIC to
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prevent blocking, or if it's permitted (not in_interrupt, not holding SMP locks),
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pass GFP_KERNEL to allow blocking. Like dma_alloc_coherent(), this returns
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two values: an address usable by the cpu, and the dma address usable by the
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pool's device.
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void dma_pool_free(struct dma_pool *pool, void *vaddr,
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dma_addr_t addr);
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void pci_pool_free(struct pci_pool *pool, void *vaddr,
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dma_addr_t addr);
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This puts memory back into the pool. The pool is what was passed to
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the pool allocation routine; the cpu (vaddr) and dma addresses are what
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were returned when that routine allocated the memory being freed.
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void dma_pool_destroy(struct dma_pool *pool);
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void pci_pool_destroy(struct pci_pool *pool);
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The pool destroy() routines free the resources of the pool. They must be
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called in a context which can sleep. Make sure you've freed all allocated
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memory back to the pool before you destroy it.
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Part Ic - DMA addressing limitations
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------------------------------------
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int
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dma_supported(struct device *dev, u64 mask)
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int
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pci_dma_supported(struct device *dev, u64 mask)
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Checks to see if the device can support DMA to the memory described by
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mask.
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Returns: 1 if it can and 0 if it can't.
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Notes: This routine merely tests to see if the mask is possible. It
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won't change the current mask settings. It is more intended as an
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internal API for use by the platform than an external API for use by
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driver writers.
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int
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dma_set_mask(struct device *dev, u64 mask)
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int
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pci_set_dma_mask(struct pci_device *dev, u64 mask)
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Checks to see if the mask is possible and updates the device
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parameters if it is.
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Returns: 0 if successful and a negative error if not.
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u64
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dma_get_required_mask(struct device *dev)
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After setting the mask with dma_set_mask(), this API returns the
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actual mask (within that already set) that the platform actually
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requires to operate efficiently. Usually this means the returned mask
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is the minimum required to cover all of memory. Examining the
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required mask gives drivers with variable descriptor sizes the
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opportunity to use smaller descriptors as necessary.
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Requesting the required mask does not alter the current mask. If you
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wish to take advantage of it, you should issue another dma_set_mask()
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call to lower the mask again.
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Part Id - Streaming DMA mappings
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--------------------------------
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dma_addr_t
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dma_map_single(struct device *dev, void *cpu_addr, size_t size,
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enum dma_data_direction direction)
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dma_addr_t
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pci_map_single(struct device *dev, void *cpu_addr, size_t size,
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int direction)
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Maps a piece of processor virtual memory so it can be accessed by the
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device and returns the physical handle of the memory.
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The direction for both api's may be converted freely by casting.
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However the dma_ API uses a strongly typed enumerator for its
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direction:
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DMA_NONE = PCI_DMA_NONE no direction (used for
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debugging)
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DMA_TO_DEVICE = PCI_DMA_TODEVICE data is going from the
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memory to the device
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DMA_FROM_DEVICE = PCI_DMA_FROMDEVICE data is coming from
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the device to the
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memory
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DMA_BIDIRECTIONAL = PCI_DMA_BIDIRECTIONAL direction isn't known
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Notes: Not all memory regions in a machine can be mapped by this
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API. Further, regions that appear to be physically contiguous in
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kernel virtual space may not be contiguous as physical memory. Since
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this API does not provide any scatter/gather capability, it will fail
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if the user tries to map a non-physically contiguous piece of memory.
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For this reason, it is recommended that memory mapped by this API be
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obtained only from sources which guarantee it to be physically contiguous
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(like kmalloc).
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Further, the physical address of the memory must be within the
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dma_mask of the device (the dma_mask represents a bit mask of the
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addressable region for the device. I.e., if the physical address of
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the memory anded with the dma_mask is still equal to the physical
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address, then the device can perform DMA to the memory). In order to
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ensure that the memory allocated by kmalloc is within the dma_mask,
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the driver may specify various platform-dependent flags to restrict
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the physical memory range of the allocation (e.g. on x86, GFP_DMA
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guarantees to be within the first 16Mb of available physical memory,
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as required by ISA devices).
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Note also that the above constraints on physical contiguity and
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dma_mask may not apply if the platform has an IOMMU (a device which
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supplies a physical to virtual mapping between the I/O memory bus and
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the device). However, to be portable, device driver writers may *not*
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assume that such an IOMMU exists.
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Warnings: Memory coherency operates at a granularity called the cache
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line width. In order for memory mapped by this API to operate
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correctly, the mapped region must begin exactly on a cache line
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boundary and end exactly on one (to prevent two separately mapped
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regions from sharing a single cache line). Since the cache line size
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may not be known at compile time, the API will not enforce this
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requirement. Therefore, it is recommended that driver writers who
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don't take special care to determine the cache line size at run time
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only map virtual regions that begin and end on page boundaries (which
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are guaranteed also to be cache line boundaries).
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DMA_TO_DEVICE synchronisation must be done after the last modification
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of the memory region by the software and before it is handed off to
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the driver. Once this primitive is used, memory covered by this
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primitive should be treated as read-only by the device. If the device
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may write to it at any point, it should be DMA_BIDIRECTIONAL (see
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below).
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DMA_FROM_DEVICE synchronisation must be done before the driver
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accesses data that may be changed by the device. This memory should
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be treated as read-only by the driver. If the driver needs to write
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to it at any point, it should be DMA_BIDIRECTIONAL (see below).
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DMA_BIDIRECTIONAL requires special handling: it means that the driver
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isn't sure if the memory was modified before being handed off to the
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device and also isn't sure if the device will also modify it. Thus,
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you must always sync bidirectional memory twice: once before the
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memory is handed off to the device (to make sure all memory changes
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are flushed from the processor) and once before the data may be
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accessed after being used by the device (to make sure any processor
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cache lines are updated with data that the device may have changed).
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void
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dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
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enum dma_data_direction direction)
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void
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pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
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size_t size, int direction)
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Unmaps the region previously mapped. All the parameters passed in
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must be identical to those passed in (and returned) by the mapping
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API.
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dma_addr_t
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dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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dma_addr_t
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pci_map_page(struct pci_dev *hwdev, struct page *page,
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unsigned long offset, size_t size, int direction)
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void
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dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
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enum dma_data_direction direction)
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void
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pci_unmap_page(struct pci_dev *hwdev, dma_addr_t dma_address,
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size_t size, int direction)
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API for mapping and unmapping for pages. All the notes and warnings
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for the other mapping APIs apply here. Also, although the <offset>
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and <size> parameters are provided to do partial page mapping, it is
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recommended that you never use these unless you really know what the
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cache width is.
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int
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dma_mapping_error(dma_addr_t dma_addr)
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int
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pci_dma_mapping_error(dma_addr_t dma_addr)
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In some circumstances dma_map_single and dma_map_page will fail to create
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a mapping. A driver can check for these errors by testing the returned
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dma address with dma_mapping_error(). A non-zero return value means the mapping
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could not be created and the driver should take appropriate action (e.g.
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reduce current DMA mapping usage or delay and try again later).
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int
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dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction)
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int
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pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
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int nents, int direction)
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Maps a scatter gather list from the block layer.
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Returns: the number of physical segments mapped (this may be shorter
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than <nents> passed in if the block layer determines that some
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elements of the scatter/gather list are physically adjacent and thus
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may be mapped with a single entry).
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Please note that the sg cannot be mapped again if it has been mapped once.
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The mapping process is allowed to destroy information in the sg.
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As with the other mapping interfaces, dma_map_sg can fail. When it
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does, 0 is returned and a driver must take appropriate action. It is
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critical that the driver do something, in the case of a block driver
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aborting the request or even oopsing is better than doing nothing and
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corrupting the filesystem.
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With scatterlists, you use the resulting mapping like this:
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int i, count = dma_map_sg(dev, sglist, nents, direction);
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struct scatterlist *sg;
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for (i = 0, sg = sglist; i < count; i++, sg++) {
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hw_address[i] = sg_dma_address(sg);
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hw_len[i] = sg_dma_len(sg);
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}
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where nents is the number of entries in the sglist.
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The implementation is free to merge several consecutive sglist entries
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into one (e.g. with an IOMMU, or if several pages just happen to be
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physically contiguous) and returns the actual number of sg entries it
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mapped them to. On failure 0, is returned.
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Then you should loop count times (note: this can be less than nents times)
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and use sg_dma_address() and sg_dma_len() macros where you previously
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accessed sg->address and sg->length as shown above.
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void
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dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nhwentries, enum dma_data_direction direction)
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void
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pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
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int nents, int direction)
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Unmap the previously mapped scatter/gather list. All the parameters
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must be the same as those and passed in to the scatter/gather mapping
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API.
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Note: <nents> must be the number you passed in, *not* the number of
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physical entries returned.
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void
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dma_sync_single(struct device *dev, dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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void
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pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle,
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size_t size, int direction)
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void
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dma_sync_sg(struct device *dev, struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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void
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pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg,
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int nelems, int direction)
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Synchronise a single contiguous or scatter/gather mapping. All the
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parameters must be the same as those passed into the single mapping
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API.
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Notes: You must do this:
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- Before reading values that have been written by DMA from the device
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(use the DMA_FROM_DEVICE direction)
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- After writing values that will be written to the device using DMA
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(use the DMA_TO_DEVICE) direction
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- before *and* after handing memory to the device if the memory is
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DMA_BIDIRECTIONAL
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See also dma_map_single().
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Part II - Advanced dma_ usage
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-----------------------------
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Warning: These pieces of the DMA API have no PCI equivalent. They
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should also not be used in the majority of cases, since they cater for
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unlikely corner cases that don't belong in usual drivers.
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If you don't understand how cache line coherency works between a
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processor and an I/O device, you should not be using this part of the
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API at all.
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void *
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dma_alloc_noncoherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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Identical to dma_alloc_coherent() except that the platform will
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choose to return either consistent or non-consistent memory as it sees
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fit. By using this API, you are guaranteeing to the platform that you
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have all the correct and necessary sync points for this memory in the
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driver should it choose to return non-consistent memory.
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Note: where the platform can return consistent memory, it will
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guarantee that the sync points become nops.
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Warning: Handling non-consistent memory is a real pain. You should
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only ever use this API if you positively know your driver will be
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required to work on one of the rare (usually non-PCI) architectures
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that simply cannot make consistent memory.
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void
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dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_handle)
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Free memory allocated by the nonconsistent API. All parameters must
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be identical to those passed in (and returned by
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dma_alloc_noncoherent()).
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int
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dma_is_consistent(struct device *dev, dma_addr_t dma_handle)
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Returns true if the device dev is performing consistent DMA on the memory
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area pointed to by the dma_handle.
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int
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dma_get_cache_alignment(void)
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Returns the processor cache alignment. This is the absolute minimum
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alignment *and* width that you must observe when either mapping
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memory or doing partial flushes.
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Notes: This API may return a number *larger* than the actual cache
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line, but it will guarantee that one or more cache lines fit exactly
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into the width returned by this call. It will also always be a power
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of two for easy alignment.
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void
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dma_sync_single_range(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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Does a partial sync, starting at offset and continuing for size. You
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must be careful to observe the cache alignment and width when doing
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anything like this. You must also be extra careful about accessing
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memory you intend to sync partially.
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void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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Do a partial sync of memory that was allocated by
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dma_alloc_noncoherent(), starting at virtual address vaddr and
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continuing on for size. Again, you *must* observe the cache line
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boundaries when doing this.
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int
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dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
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dma_addr_t device_addr, size_t size, int
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flags)
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Declare region of memory to be handed out by dma_alloc_coherent when
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it's asked for coherent memory for this device.
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bus_addr is the physical address to which the memory is currently
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assigned in the bus responding region (this will be used by the
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platform to perform the mapping).
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device_addr is the physical address the device needs to be programmed
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with actually to address this memory (this will be handed out as the
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dma_addr_t in dma_alloc_coherent()).
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size is the size of the area (must be multiples of PAGE_SIZE).
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flags can be or'd together and are:
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DMA_MEMORY_MAP - request that the memory returned from
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dma_alloc_coherent() be directly writable.
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DMA_MEMORY_IO - request that the memory returned from
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dma_alloc_coherent() be addressable using read/write/memcpy_toio etc.
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One or both of these flags must be present.
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DMA_MEMORY_INCLUDES_CHILDREN - make the declared memory be allocated by
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dma_alloc_coherent of any child devices of this one (for memory residing
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on a bridge).
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DMA_MEMORY_EXCLUSIVE - only allocate memory from the declared regions.
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Do not allow dma_alloc_coherent() to fall back to system memory when
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it's out of memory in the declared region.
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The return value will be either DMA_MEMORY_MAP or DMA_MEMORY_IO and
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must correspond to a passed in flag (i.e. no returning DMA_MEMORY_IO
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if only DMA_MEMORY_MAP were passed in) for success or zero for
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failure.
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Note, for DMA_MEMORY_IO returns, all subsequent memory returned by
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dma_alloc_coherent() may no longer be accessed directly, but instead
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must be accessed using the correct bus functions. If your driver
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isn't prepared to handle this contingency, it should not specify
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DMA_MEMORY_IO in the input flags.
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As a simplification for the platforms, only *one* such region of
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memory may be declared per device.
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For reasons of efficiency, most platforms choose to track the declared
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region only at the granularity of a page. For smaller allocations,
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you should use the dma_pool() API.
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void
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dma_release_declared_memory(struct device *dev)
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Remove the memory region previously declared from the system. This
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API performs *no* in-use checking for this region and will return
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unconditionally having removed all the required structures. It is the
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driver's job to ensure that no parts of this memory region are
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currently in use.
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void *
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dma_mark_declared_memory_occupied(struct device *dev,
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dma_addr_t device_addr, size_t size)
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This is used to occupy specific regions of the declared space
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(dma_alloc_coherent() will hand out the first free region it finds).
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device_addr is the *device* address of the region requested.
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size is the size (and should be a page-sized multiple).
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The return value will be either a pointer to the processor virtual
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address of the memory, or an error (via PTR_ERR()) if any part of the
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region is occupied.
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