Neil Armstrong 3273fc63e1 drm/meson: Make DMT timings parameters and pixel clock generic ... Remove the modes timings tables for DMT modes and calculate the HW paremeters from the modes timings. Switch the DMT modes pixel clock calculation out of the static frequency list to a generic calculation from a range of possible PLL dividers. This patch is an intermediate step towards usage of the Common Clock Framwework for PLL setup, by reworking the code to have common sel_pll() function called by the CEA (HDMI) freq setup and the generic DMT frequencies setup, we should be able to simply call clk_set_rate() on the PLL clock handle in a near future. The CEA (HDMI) and CVBS modes needs very specific clock paths that CCF will never be able to determine by itself, so there is still some work to do for a full handoff to CCF handling the clocks. This setup permits setting non-CEA modes like : - 1600x900-60Hz - 1280x1024-75Hz - 1280x1024-60Hz - 1440x900-60Hz - 1366x768-60Hz - 1280x800-60Hz - 1152x864-75Hz - 1024x768-75Hz - 1024x768-70Hz - 1024x768-60Hz - 832x624-75Hz - 800x600-75Hz - 800x600-72Hz - 800x600-60Hz - 640x480-75Hz - 640x480-73Hz - 640x480-67Hz Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> [narmstrong: fixed trivial checkpatch issues] Link: https://patchwork.freedesktop.org/patch/msgid/1531726814-14638-1-git-send-email-narmstrong@baylibre.com		2018-07-16 11:14:59 +02:00
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Kconfig
Makefile
meson_canvas.c
meson_canvas.h
meson_crtc.c
meson_crtc.h
meson_drv.c
meson_drv.h
meson_dw_hdmi.c
meson_dw_hdmi.h
meson_plane.c
meson_plane.h
meson_registers.h
meson_vclk.c
meson_vclk.h
meson_venc_cvbs.c
meson_venc_cvbs.h
meson_venc.c
meson_venc.h
meson_viu.c
meson_viu.h
meson_vpp.c
meson_vpp.h