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8bf0871539
Commit 7a7ffe65c8 ("crypto: skcipher - Add top-level skcipher interface")
dated 20 august 2015 introduced the new skcipher API which is supposed to
replace both blkcipher and ablkcipher. While all consumers of the API have
been converted long ago, some producers of the ablkcipher remain, forcing
us to keep the ablkcipher support routines alive, along with the matching
code to expose [a]blkciphers via the skcipher API.
So switch this driver to the skcipher API, allowing us to finally drop the
ablkcipher code in the near future.
Reviewed-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
96 lines
2.8 KiB
C
96 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
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*/
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#ifndef _COMMON_H_
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#define _COMMON_H_
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#include <linux/crypto.h>
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#include <linux/types.h>
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#include <crypto/aes.h>
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#include <crypto/hash.h>
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#include <crypto/internal/skcipher.h>
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/* key size in bytes */
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#define QCE_SHA_HMAC_KEY_SIZE 64
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#define QCE_MAX_CIPHER_KEY_SIZE AES_KEYSIZE_256
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/* IV length in bytes */
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#define QCE_AES_IV_LENGTH AES_BLOCK_SIZE
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/* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
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#define QCE_MAX_IV_SIZE AES_BLOCK_SIZE
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/* maximum nonce bytes */
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#define QCE_MAX_NONCE 16
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#define QCE_MAX_NONCE_WORDS (QCE_MAX_NONCE / sizeof(u32))
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/* burst size alignment requirement */
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#define QCE_MAX_ALIGN_SIZE 64
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/* cipher algorithms */
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#define QCE_ALG_DES BIT(0)
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#define QCE_ALG_3DES BIT(1)
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#define QCE_ALG_AES BIT(2)
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/* hash and hmac algorithms */
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#define QCE_HASH_SHA1 BIT(3)
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#define QCE_HASH_SHA256 BIT(4)
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#define QCE_HASH_SHA1_HMAC BIT(5)
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#define QCE_HASH_SHA256_HMAC BIT(6)
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#define QCE_HASH_AES_CMAC BIT(7)
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/* cipher modes */
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#define QCE_MODE_CBC BIT(8)
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#define QCE_MODE_ECB BIT(9)
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#define QCE_MODE_CTR BIT(10)
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#define QCE_MODE_XTS BIT(11)
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#define QCE_MODE_CCM BIT(12)
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#define QCE_MODE_MASK GENMASK(12, 8)
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/* cipher encryption/decryption operations */
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#define QCE_ENCRYPT BIT(13)
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#define QCE_DECRYPT BIT(14)
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#define IS_DES(flags) (flags & QCE_ALG_DES)
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#define IS_3DES(flags) (flags & QCE_ALG_3DES)
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#define IS_AES(flags) (flags & QCE_ALG_AES)
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#define IS_SHA1(flags) (flags & QCE_HASH_SHA1)
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#define IS_SHA256(flags) (flags & QCE_HASH_SHA256)
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#define IS_SHA1_HMAC(flags) (flags & QCE_HASH_SHA1_HMAC)
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#define IS_SHA256_HMAC(flags) (flags & QCE_HASH_SHA256_HMAC)
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#define IS_CMAC(flags) (flags & QCE_HASH_AES_CMAC)
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#define IS_SHA(flags) (IS_SHA1(flags) || IS_SHA256(flags))
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#define IS_SHA_HMAC(flags) \
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(IS_SHA1_HMAC(flags) || IS_SHA256_HMAC(flags))
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#define IS_CBC(mode) (mode & QCE_MODE_CBC)
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#define IS_ECB(mode) (mode & QCE_MODE_ECB)
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#define IS_CTR(mode) (mode & QCE_MODE_CTR)
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#define IS_XTS(mode) (mode & QCE_MODE_XTS)
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#define IS_CCM(mode) (mode & QCE_MODE_CCM)
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#define IS_ENCRYPT(dir) (dir & QCE_ENCRYPT)
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#define IS_DECRYPT(dir) (dir & QCE_DECRYPT)
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struct qce_alg_template {
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struct list_head entry;
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u32 crypto_alg_type;
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unsigned long alg_flags;
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const u32 *std_iv;
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union {
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struct skcipher_alg skcipher;
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struct ahash_alg ahash;
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} alg;
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struct qce_device *qce;
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};
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void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len);
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int qce_check_status(struct qce_device *qce, u32 *status);
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void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step);
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int qce_start(struct crypto_async_request *async_req, u32 type, u32 totallen,
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u32 offset);
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#endif /* _COMMON_H_ */
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