mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
64a6301ebe
Add debugfs to provides IO operation debug information and add BD processing timeout count function Signed-off-by: Hui Tang <tanghui20@huawei.com> Signed-off-by: Longfang Liu <liulongfang@huawei.com> Signed-off-by: Shukun Tan <tanshukun1@huawei.com> Reviewed-by: Zaibo Xu <xuzaibo@huawei.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
1196 lines
27 KiB
C
1196 lines
27 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2019 HiSilicon Limited. */
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#include <crypto/akcipher.h>
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#include <crypto/dh.h>
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#include <crypto/internal/akcipher.h>
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#include <crypto/internal/kpp.h>
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#include <crypto/internal/rsa.h>
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#include <crypto/kpp.h>
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#include <crypto/scatterwalk.h>
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#include <linux/dma-mapping.h>
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#include <linux/fips.h>
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#include <linux/module.h>
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#include <linux/time.h>
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#include "hpre.h"
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struct hpre_ctx;
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#define HPRE_CRYPTO_ALG_PRI 1000
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#define HPRE_ALIGN_SZ 64
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#define HPRE_BITS_2_BYTES_SHIFT 3
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#define HPRE_RSA_512BITS_KSZ 64
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#define HPRE_RSA_1536BITS_KSZ 192
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#define HPRE_CRT_PRMS 5
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#define HPRE_CRT_Q 2
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#define HPRE_CRT_P 3
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#define HPRE_CRT_INV 4
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#define HPRE_DH_G_FLAG 0x02
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#define HPRE_TRY_SEND_TIMES 100
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#define HPRE_INVLD_REQ_ID (-1)
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#define HPRE_DEV(ctx) (&((ctx)->qp->qm->pdev->dev))
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#define HPRE_SQE_ALG_BITS 5
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#define HPRE_SQE_DONE_SHIFT 30
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#define HPRE_DH_MAX_P_SZ 512
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#define HPRE_DFX_SEC_TO_US 1000000
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#define HPRE_DFX_US_TO_NS 1000
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typedef void (*hpre_cb)(struct hpre_ctx *ctx, void *sqe);
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struct hpre_rsa_ctx {
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/* low address: e--->n */
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char *pubkey;
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dma_addr_t dma_pubkey;
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/* low address: d--->n */
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char *prikey;
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dma_addr_t dma_prikey;
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/* low address: dq->dp->q->p->qinv */
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char *crt_prikey;
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dma_addr_t dma_crt_prikey;
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struct crypto_akcipher *soft_tfm;
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};
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struct hpre_dh_ctx {
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/*
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* If base is g we compute the public key
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* ya = g^xa mod p; [RFC2631 sec 2.1.1]
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* else if base if the counterpart public key we
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* compute the shared secret
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* ZZ = yb^xa mod p; [RFC2631 sec 2.1.1]
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*/
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char *xa_p; /* low address: d--->n, please refer to Hisilicon HPRE UM */
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dma_addr_t dma_xa_p;
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char *g; /* m */
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dma_addr_t dma_g;
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};
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struct hpre_ctx {
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struct hisi_qp *qp;
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struct hpre_asym_request **req_list;
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struct hpre *hpre;
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spinlock_t req_lock;
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unsigned int key_sz;
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bool crt_g2_mode;
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struct idr req_idr;
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union {
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struct hpre_rsa_ctx rsa;
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struct hpre_dh_ctx dh;
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};
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};
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struct hpre_asym_request {
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char *src;
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char *dst;
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struct hpre_sqe req;
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struct hpre_ctx *ctx;
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union {
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struct akcipher_request *rsa;
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struct kpp_request *dh;
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} areq;
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int err;
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int req_id;
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hpre_cb cb;
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struct timespec64 req_time;
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};
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static DEFINE_MUTEX(hpre_alg_lock);
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static unsigned int hpre_active_devs;
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static int hpre_alloc_req_id(struct hpre_ctx *ctx)
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{
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unsigned long flags;
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int id;
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spin_lock_irqsave(&ctx->req_lock, flags);
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id = idr_alloc(&ctx->req_idr, NULL, 0, QM_Q_DEPTH, GFP_ATOMIC);
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spin_unlock_irqrestore(&ctx->req_lock, flags);
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return id;
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}
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static void hpre_free_req_id(struct hpre_ctx *ctx, int req_id)
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{
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unsigned long flags;
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spin_lock_irqsave(&ctx->req_lock, flags);
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idr_remove(&ctx->req_idr, req_id);
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spin_unlock_irqrestore(&ctx->req_lock, flags);
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}
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static int hpre_add_req_to_ctx(struct hpre_asym_request *hpre_req)
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{
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struct hpre_ctx *ctx;
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struct hpre_dfx *dfx;
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int id;
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ctx = hpre_req->ctx;
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id = hpre_alloc_req_id(ctx);
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if (unlikely(id < 0))
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return -EINVAL;
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ctx->req_list[id] = hpre_req;
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hpre_req->req_id = id;
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dfx = ctx->hpre->debug.dfx;
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if (atomic64_read(&dfx[HPRE_OVERTIME_THRHLD].value))
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ktime_get_ts64(&hpre_req->req_time);
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return id;
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}
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static void hpre_rm_req_from_ctx(struct hpre_asym_request *hpre_req)
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{
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struct hpre_ctx *ctx = hpre_req->ctx;
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int id = hpre_req->req_id;
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if (hpre_req->req_id >= 0) {
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hpre_req->req_id = HPRE_INVLD_REQ_ID;
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ctx->req_list[id] = NULL;
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hpre_free_req_id(ctx, id);
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}
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}
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static struct hisi_qp *hpre_get_qp_and_start(void)
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{
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struct hisi_qp *qp;
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int ret;
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qp = hpre_create_qp();
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if (!qp) {
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pr_err("Can not create hpre qp!\n");
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return ERR_PTR(-ENODEV);
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}
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ret = hisi_qm_start_qp(qp, 0);
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if (ret < 0) {
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hisi_qm_free_qps(&qp, 1);
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pci_err(qp->qm->pdev, "Can not start qp!\n");
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return ERR_PTR(-EINVAL);
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}
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return qp;
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}
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static int hpre_get_data_dma_addr(struct hpre_asym_request *hpre_req,
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struct scatterlist *data, unsigned int len,
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int is_src, dma_addr_t *tmp)
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{
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struct hpre_ctx *ctx = hpre_req->ctx;
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struct device *dev = HPRE_DEV(ctx);
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enum dma_data_direction dma_dir;
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if (is_src) {
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hpre_req->src = NULL;
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dma_dir = DMA_TO_DEVICE;
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} else {
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hpre_req->dst = NULL;
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dma_dir = DMA_FROM_DEVICE;
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}
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*tmp = dma_map_single(dev, sg_virt(data),
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len, dma_dir);
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if (unlikely(dma_mapping_error(dev, *tmp))) {
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dev_err(dev, "dma map data err!\n");
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return -ENOMEM;
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}
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return 0;
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}
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static int hpre_prepare_dma_buf(struct hpre_asym_request *hpre_req,
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struct scatterlist *data, unsigned int len,
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int is_src, dma_addr_t *tmp)
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{
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struct hpre_ctx *ctx = hpre_req->ctx;
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struct device *dev = HPRE_DEV(ctx);
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void *ptr;
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int shift;
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shift = ctx->key_sz - len;
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if (unlikely(shift < 0))
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return -EINVAL;
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ptr = dma_alloc_coherent(dev, ctx->key_sz, tmp, GFP_KERNEL);
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if (unlikely(!ptr))
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return -ENOMEM;
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if (is_src) {
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scatterwalk_map_and_copy(ptr + shift, data, 0, len, 0);
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hpre_req->src = ptr;
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} else {
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hpre_req->dst = ptr;
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}
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return 0;
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}
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static int hpre_hw_data_init(struct hpre_asym_request *hpre_req,
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struct scatterlist *data, unsigned int len,
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int is_src, int is_dh)
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{
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struct hpre_sqe *msg = &hpre_req->req;
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struct hpre_ctx *ctx = hpre_req->ctx;
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dma_addr_t tmp = 0;
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int ret;
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/* when the data is dh's source, we should format it */
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if ((sg_is_last(data) && len == ctx->key_sz) &&
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((is_dh && !is_src) || !is_dh))
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ret = hpre_get_data_dma_addr(hpre_req, data, len, is_src, &tmp);
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else
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ret = hpre_prepare_dma_buf(hpre_req, data, len,
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is_src, &tmp);
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if (unlikely(ret))
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return ret;
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if (is_src)
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msg->in = cpu_to_le64(tmp);
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else
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msg->out = cpu_to_le64(tmp);
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return 0;
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}
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static void hpre_hw_data_clr_all(struct hpre_ctx *ctx,
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struct hpre_asym_request *req,
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struct scatterlist *dst,
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struct scatterlist *src)
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{
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struct device *dev = HPRE_DEV(ctx);
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struct hpre_sqe *sqe = &req->req;
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dma_addr_t tmp;
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tmp = le64_to_cpu(sqe->in);
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if (unlikely(!tmp))
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return;
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if (src) {
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if (req->src)
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dma_free_coherent(dev, ctx->key_sz,
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req->src, tmp);
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else
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dma_unmap_single(dev, tmp,
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ctx->key_sz, DMA_TO_DEVICE);
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}
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tmp = le64_to_cpu(sqe->out);
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if (unlikely(!tmp))
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return;
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if (req->dst) {
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if (dst)
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scatterwalk_map_and_copy(req->dst, dst, 0,
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ctx->key_sz, 1);
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dma_free_coherent(dev, ctx->key_sz, req->dst, tmp);
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} else {
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dma_unmap_single(dev, tmp, ctx->key_sz, DMA_FROM_DEVICE);
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}
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}
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static int hpre_alg_res_post_hf(struct hpre_ctx *ctx, struct hpre_sqe *sqe,
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void **kreq)
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{
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struct hpre_asym_request *req;
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int err, id, done;
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#define HPRE_NO_HW_ERR 0
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#define HPRE_HW_TASK_DONE 3
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#define HREE_HW_ERR_MASK 0x7ff
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#define HREE_SQE_DONE_MASK 0x3
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id = (int)le16_to_cpu(sqe->tag);
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req = ctx->req_list[id];
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hpre_rm_req_from_ctx(req);
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*kreq = req;
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err = (le32_to_cpu(sqe->dw0) >> HPRE_SQE_ALG_BITS) &
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HREE_HW_ERR_MASK;
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done = (le32_to_cpu(sqe->dw0) >> HPRE_SQE_DONE_SHIFT) &
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HREE_SQE_DONE_MASK;
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if (likely(err == HPRE_NO_HW_ERR && done == HPRE_HW_TASK_DONE))
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return 0;
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return -EINVAL;
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}
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static int hpre_ctx_set(struct hpre_ctx *ctx, struct hisi_qp *qp, int qlen)
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{
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struct hpre *hpre;
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if (!ctx || !qp || qlen < 0)
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return -EINVAL;
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spin_lock_init(&ctx->req_lock);
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ctx->qp = qp;
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hpre = container_of(ctx->qp->qm, struct hpre, qm);
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ctx->hpre = hpre;
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ctx->req_list = kcalloc(qlen, sizeof(void *), GFP_KERNEL);
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if (!ctx->req_list)
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return -ENOMEM;
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ctx->key_sz = 0;
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ctx->crt_g2_mode = false;
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idr_init(&ctx->req_idr);
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return 0;
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}
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static void hpre_ctx_clear(struct hpre_ctx *ctx, bool is_clear_all)
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{
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if (is_clear_all) {
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idr_destroy(&ctx->req_idr);
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kfree(ctx->req_list);
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hisi_qm_free_qps(&ctx->qp, 1);
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}
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ctx->crt_g2_mode = false;
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ctx->key_sz = 0;
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}
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static bool hpre_is_bd_timeout(struct hpre_asym_request *req,
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u64 overtime_thrhld)
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{
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struct timespec64 reply_time;
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u64 time_use_us;
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ktime_get_ts64(&reply_time);
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time_use_us = (reply_time.tv_sec - req->req_time.tv_sec) *
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HPRE_DFX_SEC_TO_US +
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(reply_time.tv_nsec - req->req_time.tv_nsec) /
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HPRE_DFX_US_TO_NS;
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if (time_use_us <= overtime_thrhld)
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return false;
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return true;
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}
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static void hpre_dh_cb(struct hpre_ctx *ctx, void *resp)
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{
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struct hpre_dfx *dfx = ctx->hpre->debug.dfx;
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struct hpre_asym_request *req;
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struct kpp_request *areq;
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u64 overtime_thrhld;
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int ret;
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ret = hpre_alg_res_post_hf(ctx, resp, (void **)&req);
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areq = req->areq.dh;
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areq->dst_len = ctx->key_sz;
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overtime_thrhld = atomic64_read(&dfx[HPRE_OVERTIME_THRHLD].value);
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if (overtime_thrhld && hpre_is_bd_timeout(req, overtime_thrhld))
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atomic64_inc(&dfx[HPRE_OVER_THRHLD_CNT].value);
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hpre_hw_data_clr_all(ctx, req, areq->dst, areq->src);
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kpp_request_complete(areq, ret);
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atomic64_inc(&dfx[HPRE_RECV_CNT].value);
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}
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static void hpre_rsa_cb(struct hpre_ctx *ctx, void *resp)
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{
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struct hpre_dfx *dfx = ctx->hpre->debug.dfx;
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struct hpre_asym_request *req;
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struct akcipher_request *areq;
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u64 overtime_thrhld;
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int ret;
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ret = hpre_alg_res_post_hf(ctx, resp, (void **)&req);
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overtime_thrhld = atomic64_read(&dfx[HPRE_OVERTIME_THRHLD].value);
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if (overtime_thrhld && hpre_is_bd_timeout(req, overtime_thrhld))
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atomic64_inc(&dfx[HPRE_OVER_THRHLD_CNT].value);
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areq = req->areq.rsa;
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areq->dst_len = ctx->key_sz;
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hpre_hw_data_clr_all(ctx, req, areq->dst, areq->src);
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akcipher_request_complete(areq, ret);
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atomic64_inc(&dfx[HPRE_RECV_CNT].value);
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}
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static void hpre_alg_cb(struct hisi_qp *qp, void *resp)
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{
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struct hpre_ctx *ctx = qp->qp_ctx;
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struct hpre_dfx *dfx = ctx->hpre->debug.dfx;
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struct hpre_sqe *sqe = resp;
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struct hpre_asym_request *req = ctx->req_list[le16_to_cpu(sqe->tag)];
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if (unlikely(!req)) {
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atomic64_inc(&dfx[HPRE_INVALID_REQ_CNT].value);
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return;
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}
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req->cb(ctx, resp);
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}
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static int hpre_ctx_init(struct hpre_ctx *ctx)
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{
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struct hisi_qp *qp;
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qp = hpre_get_qp_and_start();
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if (IS_ERR(qp))
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return PTR_ERR(qp);
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qp->qp_ctx = ctx;
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qp->req_cb = hpre_alg_cb;
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return hpre_ctx_set(ctx, qp, QM_Q_DEPTH);
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}
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static int hpre_msg_request_set(struct hpre_ctx *ctx, void *req, bool is_rsa)
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{
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struct hpre_asym_request *h_req;
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struct hpre_sqe *msg;
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int req_id;
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void *tmp;
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if (is_rsa) {
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struct akcipher_request *akreq = req;
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if (akreq->dst_len < ctx->key_sz) {
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akreq->dst_len = ctx->key_sz;
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return -EOVERFLOW;
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}
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tmp = akcipher_request_ctx(akreq);
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h_req = PTR_ALIGN(tmp, HPRE_ALIGN_SZ);
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h_req->cb = hpre_rsa_cb;
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h_req->areq.rsa = akreq;
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msg = &h_req->req;
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memset(msg, 0, sizeof(*msg));
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} else {
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struct kpp_request *kreq = req;
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if (kreq->dst_len < ctx->key_sz) {
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kreq->dst_len = ctx->key_sz;
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return -EOVERFLOW;
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}
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tmp = kpp_request_ctx(kreq);
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h_req = PTR_ALIGN(tmp, HPRE_ALIGN_SZ);
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h_req->cb = hpre_dh_cb;
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h_req->areq.dh = kreq;
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msg = &h_req->req;
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memset(msg, 0, sizeof(*msg));
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msg->key = cpu_to_le64((u64)ctx->dh.dma_xa_p);
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}
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msg->dw0 |= cpu_to_le32(0x1 << HPRE_SQE_DONE_SHIFT);
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msg->task_len1 = (ctx->key_sz >> HPRE_BITS_2_BYTES_SHIFT) - 1;
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h_req->ctx = ctx;
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req_id = hpre_add_req_to_ctx(h_req);
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if (req_id < 0)
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return -EBUSY;
|
|
|
|
msg->tag = cpu_to_le16((u16)req_id);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hpre_send(struct hpre_ctx *ctx, struct hpre_sqe *msg)
|
|
{
|
|
struct hpre_dfx *dfx = ctx->hpre->debug.dfx;
|
|
int ctr = 0;
|
|
int ret;
|
|
|
|
do {
|
|
atomic64_inc(&dfx[HPRE_SEND_CNT].value);
|
|
ret = hisi_qp_send(ctx->qp, msg);
|
|
if (ret != -EBUSY)
|
|
break;
|
|
atomic64_inc(&dfx[HPRE_SEND_BUSY_CNT].value);
|
|
} while (ctr++ < HPRE_TRY_SEND_TIMES);
|
|
|
|
if (likely(!ret))
|
|
return ret;
|
|
|
|
if (ret != -EBUSY)
|
|
atomic64_inc(&dfx[HPRE_SEND_FAIL_CNT].value);
|
|
|
|
return ret;
|
|
}
|
|
|
|
#ifdef CONFIG_CRYPTO_DH
|
|
static int hpre_dh_compute_value(struct kpp_request *req)
|
|
{
|
|
struct crypto_kpp *tfm = crypto_kpp_reqtfm(req);
|
|
struct hpre_ctx *ctx = kpp_tfm_ctx(tfm);
|
|
void *tmp = kpp_request_ctx(req);
|
|
struct hpre_asym_request *hpre_req = PTR_ALIGN(tmp, HPRE_ALIGN_SZ);
|
|
struct hpre_sqe *msg = &hpre_req->req;
|
|
int ret;
|
|
|
|
ret = hpre_msg_request_set(ctx, req, false);
|
|
if (unlikely(ret))
|
|
return ret;
|
|
|
|
if (req->src) {
|
|
ret = hpre_hw_data_init(hpre_req, req->src, req->src_len, 1, 1);
|
|
if (unlikely(ret))
|
|
goto clear_all;
|
|
}
|
|
|
|
ret = hpre_hw_data_init(hpre_req, req->dst, req->dst_len, 0, 1);
|
|
if (unlikely(ret))
|
|
goto clear_all;
|
|
|
|
if (ctx->crt_g2_mode && !req->src)
|
|
msg->dw0 = cpu_to_le32(le32_to_cpu(msg->dw0) | HPRE_ALG_DH_G2);
|
|
else
|
|
msg->dw0 = cpu_to_le32(le32_to_cpu(msg->dw0) | HPRE_ALG_DH);
|
|
|
|
/* success */
|
|
ret = hpre_send(ctx, msg);
|
|
if (likely(!ret))
|
|
return -EINPROGRESS;
|
|
|
|
clear_all:
|
|
hpre_rm_req_from_ctx(hpre_req);
|
|
hpre_hw_data_clr_all(ctx, hpre_req, req->dst, req->src);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hpre_is_dh_params_length_valid(unsigned int key_sz)
|
|
{
|
|
#define _HPRE_DH_GRP1 768
|
|
#define _HPRE_DH_GRP2 1024
|
|
#define _HPRE_DH_GRP5 1536
|
|
#define _HPRE_DH_GRP14 2048
|
|
#define _HPRE_DH_GRP15 3072
|
|
#define _HPRE_DH_GRP16 4096
|
|
switch (key_sz) {
|
|
case _HPRE_DH_GRP1:
|
|
case _HPRE_DH_GRP2:
|
|
case _HPRE_DH_GRP5:
|
|
case _HPRE_DH_GRP14:
|
|
case _HPRE_DH_GRP15:
|
|
case _HPRE_DH_GRP16:
|
|
return 0;
|
|
}
|
|
|
|
return -EINVAL;
|
|
}
|
|
|
|
static int hpre_dh_set_params(struct hpre_ctx *ctx, struct dh *params)
|
|
{
|
|
struct device *dev = HPRE_DEV(ctx);
|
|
unsigned int sz;
|
|
|
|
if (params->p_size > HPRE_DH_MAX_P_SZ)
|
|
return -EINVAL;
|
|
|
|
if (hpre_is_dh_params_length_valid(params->p_size <<
|
|
HPRE_BITS_2_BYTES_SHIFT))
|
|
return -EINVAL;
|
|
|
|
sz = ctx->key_sz = params->p_size;
|
|
ctx->dh.xa_p = dma_alloc_coherent(dev, sz << 1,
|
|
&ctx->dh.dma_xa_p, GFP_KERNEL);
|
|
if (!ctx->dh.xa_p)
|
|
return -ENOMEM;
|
|
|
|
memcpy(ctx->dh.xa_p + sz, params->p, sz);
|
|
|
|
/* If g equals 2 don't copy it */
|
|
if (params->g_size == 1 && *(char *)params->g == HPRE_DH_G_FLAG) {
|
|
ctx->crt_g2_mode = true;
|
|
return 0;
|
|
}
|
|
|
|
ctx->dh.g = dma_alloc_coherent(dev, sz, &ctx->dh.dma_g, GFP_KERNEL);
|
|
if (!ctx->dh.g) {
|
|
dma_free_coherent(dev, sz << 1, ctx->dh.xa_p,
|
|
ctx->dh.dma_xa_p);
|
|
ctx->dh.xa_p = NULL;
|
|
return -ENOMEM;
|
|
}
|
|
|
|
memcpy(ctx->dh.g + (sz - params->g_size), params->g, params->g_size);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void hpre_dh_clear_ctx(struct hpre_ctx *ctx, bool is_clear_all)
|
|
{
|
|
struct device *dev = HPRE_DEV(ctx);
|
|
unsigned int sz = ctx->key_sz;
|
|
|
|
if (is_clear_all)
|
|
hisi_qm_stop_qp(ctx->qp);
|
|
|
|
if (ctx->dh.g) {
|
|
dma_free_coherent(dev, sz, ctx->dh.g, ctx->dh.dma_g);
|
|
ctx->dh.g = NULL;
|
|
}
|
|
|
|
if (ctx->dh.xa_p) {
|
|
memzero_explicit(ctx->dh.xa_p, sz);
|
|
dma_free_coherent(dev, sz << 1, ctx->dh.xa_p,
|
|
ctx->dh.dma_xa_p);
|
|
ctx->dh.xa_p = NULL;
|
|
}
|
|
|
|
hpre_ctx_clear(ctx, is_clear_all);
|
|
}
|
|
|
|
static int hpre_dh_set_secret(struct crypto_kpp *tfm, const void *buf,
|
|
unsigned int len)
|
|
{
|
|
struct hpre_ctx *ctx = kpp_tfm_ctx(tfm);
|
|
struct dh params;
|
|
int ret;
|
|
|
|
if (crypto_dh_decode_key(buf, len, ¶ms) < 0)
|
|
return -EINVAL;
|
|
|
|
/* Free old secret if any */
|
|
hpre_dh_clear_ctx(ctx, false);
|
|
|
|
ret = hpre_dh_set_params(ctx, ¶ms);
|
|
if (ret < 0)
|
|
goto err_clear_ctx;
|
|
|
|
memcpy(ctx->dh.xa_p + (ctx->key_sz - params.key_size), params.key,
|
|
params.key_size);
|
|
|
|
return 0;
|
|
|
|
err_clear_ctx:
|
|
hpre_dh_clear_ctx(ctx, false);
|
|
return ret;
|
|
}
|
|
|
|
static unsigned int hpre_dh_max_size(struct crypto_kpp *tfm)
|
|
{
|
|
struct hpre_ctx *ctx = kpp_tfm_ctx(tfm);
|
|
|
|
return ctx->key_sz;
|
|
}
|
|
|
|
static int hpre_dh_init_tfm(struct crypto_kpp *tfm)
|
|
{
|
|
struct hpre_ctx *ctx = kpp_tfm_ctx(tfm);
|
|
|
|
return hpre_ctx_init(ctx);
|
|
}
|
|
|
|
static void hpre_dh_exit_tfm(struct crypto_kpp *tfm)
|
|
{
|
|
struct hpre_ctx *ctx = kpp_tfm_ctx(tfm);
|
|
|
|
hpre_dh_clear_ctx(ctx, true);
|
|
}
|
|
#endif
|
|
|
|
static void hpre_rsa_drop_leading_zeros(const char **ptr, size_t *len)
|
|
{
|
|
while (!**ptr && *len) {
|
|
(*ptr)++;
|
|
(*len)--;
|
|
}
|
|
}
|
|
|
|
static bool hpre_rsa_key_size_is_support(unsigned int len)
|
|
{
|
|
unsigned int bits = len << HPRE_BITS_2_BYTES_SHIFT;
|
|
|
|
#define _RSA_1024BITS_KEY_WDTH 1024
|
|
#define _RSA_2048BITS_KEY_WDTH 2048
|
|
#define _RSA_3072BITS_KEY_WDTH 3072
|
|
#define _RSA_4096BITS_KEY_WDTH 4096
|
|
|
|
switch (bits) {
|
|
case _RSA_1024BITS_KEY_WDTH:
|
|
case _RSA_2048BITS_KEY_WDTH:
|
|
case _RSA_3072BITS_KEY_WDTH:
|
|
case _RSA_4096BITS_KEY_WDTH:
|
|
return true;
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
static int hpre_rsa_enc(struct akcipher_request *req)
|
|
{
|
|
struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
|
|
struct hpre_ctx *ctx = akcipher_tfm_ctx(tfm);
|
|
void *tmp = akcipher_request_ctx(req);
|
|
struct hpre_asym_request *hpre_req = PTR_ALIGN(tmp, HPRE_ALIGN_SZ);
|
|
struct hpre_sqe *msg = &hpre_req->req;
|
|
int ret;
|
|
|
|
/* For 512 and 1536 bits key size, use soft tfm instead */
|
|
if (ctx->key_sz == HPRE_RSA_512BITS_KSZ ||
|
|
ctx->key_sz == HPRE_RSA_1536BITS_KSZ) {
|
|
akcipher_request_set_tfm(req, ctx->rsa.soft_tfm);
|
|
ret = crypto_akcipher_encrypt(req);
|
|
akcipher_request_set_tfm(req, tfm);
|
|
return ret;
|
|
}
|
|
|
|
if (unlikely(!ctx->rsa.pubkey))
|
|
return -EINVAL;
|
|
|
|
ret = hpre_msg_request_set(ctx, req, true);
|
|
if (unlikely(ret))
|
|
return ret;
|
|
|
|
msg->dw0 |= cpu_to_le32(HPRE_ALG_NC_NCRT);
|
|
msg->key = cpu_to_le64((u64)ctx->rsa.dma_pubkey);
|
|
|
|
ret = hpre_hw_data_init(hpre_req, req->src, req->src_len, 1, 0);
|
|
if (unlikely(ret))
|
|
goto clear_all;
|
|
|
|
ret = hpre_hw_data_init(hpre_req, req->dst, req->dst_len, 0, 0);
|
|
if (unlikely(ret))
|
|
goto clear_all;
|
|
|
|
/* success */
|
|
ret = hpre_send(ctx, msg);
|
|
if (likely(!ret))
|
|
return -EINPROGRESS;
|
|
|
|
clear_all:
|
|
hpre_rm_req_from_ctx(hpre_req);
|
|
hpre_hw_data_clr_all(ctx, hpre_req, req->dst, req->src);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hpre_rsa_dec(struct akcipher_request *req)
|
|
{
|
|
struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
|
|
struct hpre_ctx *ctx = akcipher_tfm_ctx(tfm);
|
|
void *tmp = akcipher_request_ctx(req);
|
|
struct hpre_asym_request *hpre_req = PTR_ALIGN(tmp, HPRE_ALIGN_SZ);
|
|
struct hpre_sqe *msg = &hpre_req->req;
|
|
int ret;
|
|
|
|
/* For 512 and 1536 bits key size, use soft tfm instead */
|
|
if (ctx->key_sz == HPRE_RSA_512BITS_KSZ ||
|
|
ctx->key_sz == HPRE_RSA_1536BITS_KSZ) {
|
|
akcipher_request_set_tfm(req, ctx->rsa.soft_tfm);
|
|
ret = crypto_akcipher_decrypt(req);
|
|
akcipher_request_set_tfm(req, tfm);
|
|
return ret;
|
|
}
|
|
|
|
if (unlikely(!ctx->rsa.prikey))
|
|
return -EINVAL;
|
|
|
|
ret = hpre_msg_request_set(ctx, req, true);
|
|
if (unlikely(ret))
|
|
return ret;
|
|
|
|
if (ctx->crt_g2_mode) {
|
|
msg->key = cpu_to_le64((u64)ctx->rsa.dma_crt_prikey);
|
|
msg->dw0 = cpu_to_le32(le32_to_cpu(msg->dw0) |
|
|
HPRE_ALG_NC_CRT);
|
|
} else {
|
|
msg->key = cpu_to_le64((u64)ctx->rsa.dma_prikey);
|
|
msg->dw0 = cpu_to_le32(le32_to_cpu(msg->dw0) |
|
|
HPRE_ALG_NC_NCRT);
|
|
}
|
|
|
|
ret = hpre_hw_data_init(hpre_req, req->src, req->src_len, 1, 0);
|
|
if (unlikely(ret))
|
|
goto clear_all;
|
|
|
|
ret = hpre_hw_data_init(hpre_req, req->dst, req->dst_len, 0, 0);
|
|
if (unlikely(ret))
|
|
goto clear_all;
|
|
|
|
/* success */
|
|
ret = hpre_send(ctx, msg);
|
|
if (likely(!ret))
|
|
return -EINPROGRESS;
|
|
|
|
clear_all:
|
|
hpre_rm_req_from_ctx(hpre_req);
|
|
hpre_hw_data_clr_all(ctx, hpre_req, req->dst, req->src);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hpre_rsa_set_n(struct hpre_ctx *ctx, const char *value,
|
|
size_t vlen, bool private)
|
|
{
|
|
const char *ptr = value;
|
|
|
|
hpre_rsa_drop_leading_zeros(&ptr, &vlen);
|
|
|
|
ctx->key_sz = vlen;
|
|
|
|
/* if invalid key size provided, we use software tfm */
|
|
if (!hpre_rsa_key_size_is_support(ctx->key_sz))
|
|
return 0;
|
|
|
|
ctx->rsa.pubkey = dma_alloc_coherent(HPRE_DEV(ctx), vlen << 1,
|
|
&ctx->rsa.dma_pubkey,
|
|
GFP_KERNEL);
|
|
if (!ctx->rsa.pubkey)
|
|
return -ENOMEM;
|
|
|
|
if (private) {
|
|
ctx->rsa.prikey = dma_alloc_coherent(HPRE_DEV(ctx), vlen << 1,
|
|
&ctx->rsa.dma_prikey,
|
|
GFP_KERNEL);
|
|
if (!ctx->rsa.prikey) {
|
|
dma_free_coherent(HPRE_DEV(ctx), vlen << 1,
|
|
ctx->rsa.pubkey,
|
|
ctx->rsa.dma_pubkey);
|
|
ctx->rsa.pubkey = NULL;
|
|
return -ENOMEM;
|
|
}
|
|
memcpy(ctx->rsa.prikey + vlen, ptr, vlen);
|
|
}
|
|
memcpy(ctx->rsa.pubkey + vlen, ptr, vlen);
|
|
|
|
/* Using hardware HPRE to do RSA */
|
|
return 1;
|
|
}
|
|
|
|
static int hpre_rsa_set_e(struct hpre_ctx *ctx, const char *value,
|
|
size_t vlen)
|
|
{
|
|
const char *ptr = value;
|
|
|
|
hpre_rsa_drop_leading_zeros(&ptr, &vlen);
|
|
|
|
if (!ctx->key_sz || !vlen || vlen > ctx->key_sz)
|
|
return -EINVAL;
|
|
|
|
memcpy(ctx->rsa.pubkey + ctx->key_sz - vlen, ptr, vlen);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hpre_rsa_set_d(struct hpre_ctx *ctx, const char *value,
|
|
size_t vlen)
|
|
{
|
|
const char *ptr = value;
|
|
|
|
hpre_rsa_drop_leading_zeros(&ptr, &vlen);
|
|
|
|
if (!ctx->key_sz || !vlen || vlen > ctx->key_sz)
|
|
return -EINVAL;
|
|
|
|
memcpy(ctx->rsa.prikey + ctx->key_sz - vlen, ptr, vlen);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hpre_crt_para_get(char *para, size_t para_sz,
|
|
const char *raw, size_t raw_sz)
|
|
{
|
|
const char *ptr = raw;
|
|
size_t len = raw_sz;
|
|
|
|
hpre_rsa_drop_leading_zeros(&ptr, &len);
|
|
if (!len || len > para_sz)
|
|
return -EINVAL;
|
|
|
|
memcpy(para + para_sz - len, ptr, len);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int hpre_rsa_setkey_crt(struct hpre_ctx *ctx, struct rsa_key *rsa_key)
|
|
{
|
|
unsigned int hlf_ksz = ctx->key_sz >> 1;
|
|
struct device *dev = HPRE_DEV(ctx);
|
|
u64 offset;
|
|
int ret;
|
|
|
|
ctx->rsa.crt_prikey = dma_alloc_coherent(dev, hlf_ksz * HPRE_CRT_PRMS,
|
|
&ctx->rsa.dma_crt_prikey,
|
|
GFP_KERNEL);
|
|
if (!ctx->rsa.crt_prikey)
|
|
return -ENOMEM;
|
|
|
|
ret = hpre_crt_para_get(ctx->rsa.crt_prikey, hlf_ksz,
|
|
rsa_key->dq, rsa_key->dq_sz);
|
|
if (ret)
|
|
goto free_key;
|
|
|
|
offset = hlf_ksz;
|
|
ret = hpre_crt_para_get(ctx->rsa.crt_prikey + offset, hlf_ksz,
|
|
rsa_key->dp, rsa_key->dp_sz);
|
|
if (ret)
|
|
goto free_key;
|
|
|
|
offset = hlf_ksz * HPRE_CRT_Q;
|
|
ret = hpre_crt_para_get(ctx->rsa.crt_prikey + offset, hlf_ksz,
|
|
rsa_key->q, rsa_key->q_sz);
|
|
if (ret)
|
|
goto free_key;
|
|
|
|
offset = hlf_ksz * HPRE_CRT_P;
|
|
ret = hpre_crt_para_get(ctx->rsa.crt_prikey + offset, hlf_ksz,
|
|
rsa_key->p, rsa_key->p_sz);
|
|
if (ret)
|
|
goto free_key;
|
|
|
|
offset = hlf_ksz * HPRE_CRT_INV;
|
|
ret = hpre_crt_para_get(ctx->rsa.crt_prikey + offset, hlf_ksz,
|
|
rsa_key->qinv, rsa_key->qinv_sz);
|
|
if (ret)
|
|
goto free_key;
|
|
|
|
ctx->crt_g2_mode = true;
|
|
|
|
return 0;
|
|
|
|
free_key:
|
|
offset = hlf_ksz * HPRE_CRT_PRMS;
|
|
memzero_explicit(ctx->rsa.crt_prikey, offset);
|
|
dma_free_coherent(dev, hlf_ksz * HPRE_CRT_PRMS, ctx->rsa.crt_prikey,
|
|
ctx->rsa.dma_crt_prikey);
|
|
ctx->rsa.crt_prikey = NULL;
|
|
ctx->crt_g2_mode = false;
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* If it is clear all, all the resources of the QP will be cleaned. */
|
|
static void hpre_rsa_clear_ctx(struct hpre_ctx *ctx, bool is_clear_all)
|
|
{
|
|
unsigned int half_key_sz = ctx->key_sz >> 1;
|
|
struct device *dev = HPRE_DEV(ctx);
|
|
|
|
if (is_clear_all)
|
|
hisi_qm_stop_qp(ctx->qp);
|
|
|
|
if (ctx->rsa.pubkey) {
|
|
dma_free_coherent(dev, ctx->key_sz << 1,
|
|
ctx->rsa.pubkey, ctx->rsa.dma_pubkey);
|
|
ctx->rsa.pubkey = NULL;
|
|
}
|
|
|
|
if (ctx->rsa.crt_prikey) {
|
|
memzero_explicit(ctx->rsa.crt_prikey,
|
|
half_key_sz * HPRE_CRT_PRMS);
|
|
dma_free_coherent(dev, half_key_sz * HPRE_CRT_PRMS,
|
|
ctx->rsa.crt_prikey, ctx->rsa.dma_crt_prikey);
|
|
ctx->rsa.crt_prikey = NULL;
|
|
}
|
|
|
|
if (ctx->rsa.prikey) {
|
|
memzero_explicit(ctx->rsa.prikey, ctx->key_sz);
|
|
dma_free_coherent(dev, ctx->key_sz << 1, ctx->rsa.prikey,
|
|
ctx->rsa.dma_prikey);
|
|
ctx->rsa.prikey = NULL;
|
|
}
|
|
|
|
hpre_ctx_clear(ctx, is_clear_all);
|
|
}
|
|
|
|
/*
|
|
* we should judge if it is CRT or not,
|
|
* CRT: return true, N-CRT: return false .
|
|
*/
|
|
static bool hpre_is_crt_key(struct rsa_key *key)
|
|
{
|
|
u16 len = key->p_sz + key->q_sz + key->dp_sz + key->dq_sz +
|
|
key->qinv_sz;
|
|
|
|
#define LEN_OF_NCRT_PARA 5
|
|
|
|
/* N-CRT less than 5 parameters */
|
|
return len > LEN_OF_NCRT_PARA;
|
|
}
|
|
|
|
static int hpre_rsa_setkey(struct hpre_ctx *ctx, const void *key,
|
|
unsigned int keylen, bool private)
|
|
{
|
|
struct rsa_key rsa_key;
|
|
int ret;
|
|
|
|
hpre_rsa_clear_ctx(ctx, false);
|
|
|
|
if (private)
|
|
ret = rsa_parse_priv_key(&rsa_key, key, keylen);
|
|
else
|
|
ret = rsa_parse_pub_key(&rsa_key, key, keylen);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = hpre_rsa_set_n(ctx, rsa_key.n, rsa_key.n_sz, private);
|
|
if (ret <= 0)
|
|
return ret;
|
|
|
|
if (private) {
|
|
ret = hpre_rsa_set_d(ctx, rsa_key.d, rsa_key.d_sz);
|
|
if (ret < 0)
|
|
goto free;
|
|
|
|
if (hpre_is_crt_key(&rsa_key)) {
|
|
ret = hpre_rsa_setkey_crt(ctx, &rsa_key);
|
|
if (ret < 0)
|
|
goto free;
|
|
}
|
|
}
|
|
|
|
ret = hpre_rsa_set_e(ctx, rsa_key.e, rsa_key.e_sz);
|
|
if (ret < 0)
|
|
goto free;
|
|
|
|
if ((private && !ctx->rsa.prikey) || !ctx->rsa.pubkey) {
|
|
ret = -EINVAL;
|
|
goto free;
|
|
}
|
|
|
|
return 0;
|
|
|
|
free:
|
|
hpre_rsa_clear_ctx(ctx, false);
|
|
return ret;
|
|
}
|
|
|
|
static int hpre_rsa_setpubkey(struct crypto_akcipher *tfm, const void *key,
|
|
unsigned int keylen)
|
|
{
|
|
struct hpre_ctx *ctx = akcipher_tfm_ctx(tfm);
|
|
int ret;
|
|
|
|
ret = crypto_akcipher_set_pub_key(ctx->rsa.soft_tfm, key, keylen);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return hpre_rsa_setkey(ctx, key, keylen, false);
|
|
}
|
|
|
|
static int hpre_rsa_setprivkey(struct crypto_akcipher *tfm, const void *key,
|
|
unsigned int keylen)
|
|
{
|
|
struct hpre_ctx *ctx = akcipher_tfm_ctx(tfm);
|
|
int ret;
|
|
|
|
ret = crypto_akcipher_set_priv_key(ctx->rsa.soft_tfm, key, keylen);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return hpre_rsa_setkey(ctx, key, keylen, true);
|
|
}
|
|
|
|
static unsigned int hpre_rsa_max_size(struct crypto_akcipher *tfm)
|
|
{
|
|
struct hpre_ctx *ctx = akcipher_tfm_ctx(tfm);
|
|
|
|
/* For 512 and 1536 bits key size, use soft tfm instead */
|
|
if (ctx->key_sz == HPRE_RSA_512BITS_KSZ ||
|
|
ctx->key_sz == HPRE_RSA_1536BITS_KSZ)
|
|
return crypto_akcipher_maxsize(ctx->rsa.soft_tfm);
|
|
|
|
return ctx->key_sz;
|
|
}
|
|
|
|
static int hpre_rsa_init_tfm(struct crypto_akcipher *tfm)
|
|
{
|
|
struct hpre_ctx *ctx = akcipher_tfm_ctx(tfm);
|
|
int ret;
|
|
|
|
ctx->rsa.soft_tfm = crypto_alloc_akcipher("rsa-generic", 0, 0);
|
|
if (IS_ERR(ctx->rsa.soft_tfm)) {
|
|
pr_err("Can not alloc_akcipher!\n");
|
|
return PTR_ERR(ctx->rsa.soft_tfm);
|
|
}
|
|
|
|
ret = hpre_ctx_init(ctx);
|
|
if (ret)
|
|
crypto_free_akcipher(ctx->rsa.soft_tfm);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void hpre_rsa_exit_tfm(struct crypto_akcipher *tfm)
|
|
{
|
|
struct hpre_ctx *ctx = akcipher_tfm_ctx(tfm);
|
|
|
|
hpre_rsa_clear_ctx(ctx, true);
|
|
crypto_free_akcipher(ctx->rsa.soft_tfm);
|
|
}
|
|
|
|
static struct akcipher_alg rsa = {
|
|
.sign = hpre_rsa_dec,
|
|
.verify = hpre_rsa_enc,
|
|
.encrypt = hpre_rsa_enc,
|
|
.decrypt = hpre_rsa_dec,
|
|
.set_pub_key = hpre_rsa_setpubkey,
|
|
.set_priv_key = hpre_rsa_setprivkey,
|
|
.max_size = hpre_rsa_max_size,
|
|
.init = hpre_rsa_init_tfm,
|
|
.exit = hpre_rsa_exit_tfm,
|
|
.reqsize = sizeof(struct hpre_asym_request) + HPRE_ALIGN_SZ,
|
|
.base = {
|
|
.cra_ctxsize = sizeof(struct hpre_ctx),
|
|
.cra_priority = HPRE_CRYPTO_ALG_PRI,
|
|
.cra_name = "rsa",
|
|
.cra_driver_name = "hpre-rsa",
|
|
.cra_module = THIS_MODULE,
|
|
},
|
|
};
|
|
|
|
#ifdef CONFIG_CRYPTO_DH
|
|
static struct kpp_alg dh = {
|
|
.set_secret = hpre_dh_set_secret,
|
|
.generate_public_key = hpre_dh_compute_value,
|
|
.compute_shared_secret = hpre_dh_compute_value,
|
|
.max_size = hpre_dh_max_size,
|
|
.init = hpre_dh_init_tfm,
|
|
.exit = hpre_dh_exit_tfm,
|
|
.reqsize = sizeof(struct hpre_asym_request) + HPRE_ALIGN_SZ,
|
|
.base = {
|
|
.cra_ctxsize = sizeof(struct hpre_ctx),
|
|
.cra_priority = HPRE_CRYPTO_ALG_PRI,
|
|
.cra_name = "dh",
|
|
.cra_driver_name = "hpre-dh",
|
|
.cra_module = THIS_MODULE,
|
|
},
|
|
};
|
|
#endif
|
|
|
|
int hpre_algs_register(void)
|
|
{
|
|
int ret = 0;
|
|
|
|
mutex_lock(&hpre_alg_lock);
|
|
if (++hpre_active_devs == 1) {
|
|
rsa.base.cra_flags = 0;
|
|
ret = crypto_register_akcipher(&rsa);
|
|
if (ret)
|
|
goto unlock;
|
|
#ifdef CONFIG_CRYPTO_DH
|
|
ret = crypto_register_kpp(&dh);
|
|
if (ret) {
|
|
crypto_unregister_akcipher(&rsa);
|
|
goto unlock;
|
|
}
|
|
#endif
|
|
}
|
|
|
|
unlock:
|
|
mutex_unlock(&hpre_alg_lock);
|
|
return ret;
|
|
}
|
|
|
|
void hpre_algs_unregister(void)
|
|
{
|
|
mutex_lock(&hpre_alg_lock);
|
|
if (--hpre_active_devs == 0) {
|
|
crypto_unregister_akcipher(&rsa);
|
|
#ifdef CONFIG_CRYPTO_DH
|
|
crypto_unregister_kpp(&dh);
|
|
#endif
|
|
}
|
|
mutex_unlock(&hpre_alg_lock);
|
|
}
|