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adf4b00ebf
The cache size should already be present in the L2 cache auxiliary control register: it is part of the integration process to configure the hardware IP. Most platforms get this right, yet still many cargo-cult program, and assume that they always need specifying to the L2 cache code. Remove them so we can find out which really need this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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.. | ||
include/mach | ||
generic.h | ||
headsmp.S | ||
hotplug.c | ||
Kconfig | ||
Makefile | ||
Makefile.boot | ||
pl080.c | ||
pl080.h | ||
platsmp.c | ||
restart.c | ||
spear3xx.c | ||
spear6xx.c | ||
spear13xx.c | ||
spear300.c | ||
spear310.c | ||
spear320.c | ||
spear1310.c | ||
spear1340.c | ||
time.c |