mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 10:24:11 +07:00
0937e7e712
All data is accessed RO, so mark everything const. Some vars in several functions aswell as function signatures also require the const keyword now, they're also added by this commit. Signed-off-by: Daniel Scheller <d.scheller@gmx.net> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
231 lines
5.7 KiB
C
231 lines
5.7 KiB
C
/*
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* ddbridge-i2c.c: Digital Devices bridge i2c driver
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*
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* Copyright (C) 2010-2017 Digital Devices GmbH
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* Ralph Metzler <rjkm@metzlerbros.de>
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* Marcus Metzler <mocm@metzlerbros.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 only, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/poll.h>
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#include <linux/io.h>
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/timer.h>
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#include <linux/i2c.h>
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#include <linux/swab.h>
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#include <linux/vmalloc.h>
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#include "ddbridge.h"
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#include "ddbridge-i2c.h"
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#include "ddbridge-regs.h"
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#include "ddbridge-io.h"
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/******************************************************************************/
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static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
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{
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struct ddb *dev = i2c->dev;
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unsigned long stat;
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u32 val;
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ddbwritel(dev, (adr << 9) | cmd, i2c->regs + I2C_COMMAND);
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stat = wait_for_completion_timeout(&i2c->completion, HZ);
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val = ddbreadl(dev, i2c->regs + I2C_COMMAND);
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if (stat == 0) {
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dev_err(dev->dev, "I2C timeout, card %d, port %d, link %u\n",
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dev->nr, i2c->nr, i2c->link);
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{
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u32 istat = ddbreadl(dev, INTERRUPT_STATUS);
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dev_err(dev->dev, "DDBridge IRS %08x\n", istat);
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if (i2c->link) {
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u32 listat = ddbreadl(dev,
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DDB_LINK_TAG(i2c->link) |
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INTERRUPT_STATUS);
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dev_err(dev->dev, "DDBridge link %u IRS %08x\n",
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i2c->link, listat);
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}
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if (istat & 1) {
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ddbwritel(dev, istat & 1, INTERRUPT_ACK);
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} else {
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u32 mon = ddbreadl(dev,
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i2c->regs + I2C_MONITOR);
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dev_err(dev->dev, "I2C cmd=%08x mon=%08x\n",
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val, mon);
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}
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}
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return -EIO;
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}
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if (val & 0x70000)
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return -EIO;
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return 0;
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}
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static int ddb_i2c_master_xfer(struct i2c_adapter *adapter,
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struct i2c_msg msg[], int num)
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{
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struct ddb_i2c *i2c = (struct ddb_i2c *) i2c_get_adapdata(adapter);
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struct ddb *dev = i2c->dev;
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u8 addr = 0;
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addr = msg[0].addr;
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if (msg[0].len > i2c->bsize)
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return -EIO;
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switch (num) {
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case 1:
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if (msg[0].flags & I2C_M_RD) {
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ddbwritel(dev, msg[0].len << 16,
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i2c->regs + I2C_TASKLENGTH);
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if (ddb_i2c_cmd(i2c, addr, 3))
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break;
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ddbcpyfrom(dev, msg[0].buf,
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i2c->rbuf, msg[0].len);
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return num;
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}
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ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
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ddbwritel(dev, msg[0].len, i2c->regs + I2C_TASKLENGTH);
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if (ddb_i2c_cmd(i2c, addr, 2))
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break;
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return num;
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case 2:
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if ((msg[0].flags & I2C_M_RD) == I2C_M_RD)
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break;
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if ((msg[1].flags & I2C_M_RD) != I2C_M_RD)
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break;
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if (msg[1].len > i2c->bsize)
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break;
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ddbcpyto(dev, i2c->wbuf, msg[0].buf, msg[0].len);
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ddbwritel(dev, msg[0].len | (msg[1].len << 16),
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i2c->regs + I2C_TASKLENGTH);
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if (ddb_i2c_cmd(i2c, addr, 1))
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break;
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ddbcpyfrom(dev, msg[1].buf,
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i2c->rbuf,
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msg[1].len);
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return num;
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default:
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break;
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}
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return -EIO;
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}
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static u32 ddb_i2c_functionality(struct i2c_adapter *adap)
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{
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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static const struct i2c_algorithm ddb_i2c_algo = {
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.master_xfer = ddb_i2c_master_xfer,
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.functionality = ddb_i2c_functionality,
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};
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void ddb_i2c_release(struct ddb *dev)
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{
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int i;
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struct ddb_i2c *i2c;
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for (i = 0; i < dev->i2c_num; i++) {
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i2c = &dev->i2c[i];
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i2c_del_adapter(&i2c->adap);
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}
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}
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static void i2c_handler(unsigned long priv)
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{
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struct ddb_i2c *i2c = (struct ddb_i2c *) priv;
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complete(&i2c->completion);
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}
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static int ddb_i2c_add(struct ddb *dev, struct ddb_i2c *i2c,
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const struct ddb_regmap *regmap, int link,
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int i, int num)
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{
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struct i2c_adapter *adap;
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i2c->nr = i;
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i2c->dev = dev;
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i2c->link = link;
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i2c->bsize = regmap->i2c_buf->size;
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i2c->wbuf = DDB_LINK_TAG(link) |
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(regmap->i2c_buf->base + i2c->bsize * i);
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i2c->rbuf = i2c->wbuf; /* + i2c->bsize / 2 */
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i2c->regs = DDB_LINK_TAG(link) |
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(regmap->i2c->base + regmap->i2c->size * i);
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ddbwritel(dev, I2C_SPEED_100, i2c->regs + I2C_TIMING);
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ddbwritel(dev, ((i2c->rbuf & 0xffff) << 16) | (i2c->wbuf & 0xffff),
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i2c->regs + I2C_TASKADDRESS);
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init_completion(&i2c->completion);
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adap = &i2c->adap;
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i2c_set_adapdata(adap, i2c);
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#ifdef I2C_ADAP_CLASS_TV_DIGITAL
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adap->class = I2C_ADAP_CLASS_TV_DIGITAL|I2C_CLASS_TV_ANALOG;
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#else
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#ifdef I2C_CLASS_TV_ANALOG
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adap->class = I2C_CLASS_TV_ANALOG;
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#endif
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#endif
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snprintf(adap->name, I2C_NAME_SIZE, "ddbridge_%02x.%x.%x",
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dev->nr, i2c->link, i);
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adap->algo = &ddb_i2c_algo;
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adap->algo_data = (void *)i2c;
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adap->dev.parent = dev->dev;
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return i2c_add_adapter(adap);
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}
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int ddb_i2c_init(struct ddb *dev)
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{
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int stat = 0;
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u32 i, j, num = 0, l, base;
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struct ddb_i2c *i2c;
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struct i2c_adapter *adap;
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const struct ddb_regmap *regmap;
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for (l = 0; l < DDB_MAX_LINK; l++) {
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if (!dev->link[l].info)
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continue;
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regmap = dev->link[l].info->regmap;
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if (!regmap || !regmap->i2c)
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continue;
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base = regmap->irq_base_i2c;
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for (i = 0; i < regmap->i2c->num; i++) {
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if (!(dev->link[l].info->i2c_mask & (1 << i)))
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continue;
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i2c = &dev->i2c[num];
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dev->handler_data[l][i + base] = (unsigned long) i2c;
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dev->handler[l][i + base] = i2c_handler;
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stat = ddb_i2c_add(dev, i2c, regmap, l, i, num);
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if (stat)
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break;
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num++;
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}
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}
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if (stat) {
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for (j = 0; j < num; j++) {
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i2c = &dev->i2c[j];
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adap = &i2c->adap;
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i2c_del_adapter(adap);
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}
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} else
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dev->i2c_num = num;
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return stat;
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}
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