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9849a5697d
If an architecture uses 4level-fixup.h we don't need to do anything as it includes 5level-fixup.h. If an architecture uses pgtable-nop*d.h, define __ARCH_USE_5LEVEL_HACK before inclusion of the header. It makes asm-generic code to use 5level-fixup.h. If an architecture has 4-level paging or folds levels on its own, include 5level-fixup.h directly. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Acked-by: Michal Hocko <mhocko@suse.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
51 lines
1.7 KiB
C
51 lines
1.7 KiB
C
#ifndef _H8300_PGTABLE_H
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#define _H8300_PGTABLE_H
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#define __ARCH_USE_5LEVEL_HACK
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#include <asm-generic/pgtable-nopud.h>
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#include <asm-generic/pgtable.h>
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#define pgtable_cache_init() do { } while (0)
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extern void paging_init(void);
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#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
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#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
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#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
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#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
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#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
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#define __swp_type(x) (0)
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#define __swp_offset(x) (0)
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#define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
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#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
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#define kern_addr_valid(addr) (1)
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#define pgprot_writecombine(prot) (prot)
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#define pgprot_noncached pgprot_writecombine
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static inline int pte_file(pte_t pte) { return 0; }
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#define swapper_pg_dir ((pgd_t *) 0)
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/*
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* ZERO_PAGE is a global shared page that is always zero: used
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* for zero-mapped memory areas etc..
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*/
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#define ZERO_PAGE(vaddr) (virt_to_page(0))
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/*
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* These would be in other places but having them here reduces the diffs.
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*/
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extern unsigned int kobjsize(const void *objp);
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extern int is_in_rom(unsigned long);
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/*
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* No page table caches to initialise
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*/
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#define pgtable_cache_init() do { } while (0)
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/*
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* All 32bit addresses are effectively valid for vmalloc...
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* Sort of meaningless for non-VM targets.
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*/
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#define VMALLOC_START 0
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#define VMALLOC_END 0xffffffff
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#define arch_enter_lazy_cpu_mode() do {} while (0)
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#endif /* _H8300_PGTABLE_H */
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