mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9fd7a2e063
commit200a575b68
("ARM: dts: meson: organize devices in their corresponding busses") organized all peripherals in busses so that the base register offset of the bus doesn't have to be included in all child-nodes anymore. The GPIO interrupt controller however specifies the register offset without subtracting the "cbus" base address. This leads to a problem where of_iomap inside the irq-meson-gpio driver fails because it actually tries to map 0x182209880 (cbus base = 0xc1100000 + 0xc1109880 for the GPIO interrupt controller). Fix this by using 0x9880 as register offset. Fixes:7d32bc03bc
("ARM: dts: meson8b: enable gpio interrupt controller") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
300 lines
8.0 KiB
Plaintext
300 lines
8.0 KiB
Plaintext
/*
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* Copyright 2014 Carlo Caione <carlo@caione.org>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public
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* License along with this library; if not, write to the Free
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* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/include/ "skeleton.dtsi"
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/ {
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interrupt-parent = <&gic>;
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L2: l2-cache-controller@c4200000 {
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compatible = "arm,pl310-cache";
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reg = <0xc4200000 0x1000>;
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cache-unified;
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cache-level = <2>;
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};
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gic: interrupt-controller@c4301000 {
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compatible = "arm,cortex-a9-gic";
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reg = <0xc4301000 0x1000>,
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<0xc4300100 0x0100>;
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interrupt-controller;
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#interrupt-cells = <3>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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cbus: cbus@c1100000 {
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compatible = "simple-bus";
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reg = <0xc1100000 0x200000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0xc1100000 0x200000>;
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assist: assist@7c00 {
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compatible = "amlogic,meson-mx-assist", "syscon";
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reg = <0x7c00 0x200>;
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};
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hwrng: rng@8100 {
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compatible = "amlogic,meson-rng";
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reg = <0x8100 0x8>;
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};
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uart_A: serial@84c0 {
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compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
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reg = <0x84c0 0x18>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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uart_B: serial@84dc {
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compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
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reg = <0x84dc 0x18>;
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interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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i2c_A: i2c@8500 {
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compatible = "amlogic,meson6-i2c";
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reg = <0x8500 0x20>;
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interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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pwm_ab: pwm@8550 {
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compatible = "amlogic,meson-pwm";
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reg = <0x8550 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_cd: pwm@8650 {
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compatible = "amlogic,meson-pwm";
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reg = <0x8650 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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saradc: adc@8680 {
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compatible = "amlogic,meson-saradc";
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reg = <0x8680 0x34>;
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#io-channel-cells = <1>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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uart_C: serial@8700 {
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compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
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reg = <0x8700 0x18>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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i2c_B: i2c@87c0 {
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compatible = "amlogic,meson6-i2c";
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reg = <0x87c0 0x20>;
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interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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usb0_phy: phy@8800 {
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compatible = "amlogic,meson-mx-usb2-phy";
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#phy-cells = <0>;
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reg = <0x8800 0x20>;
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status = "disabled";
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};
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usb1_phy: phy@8820 {
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compatible = "amlogic,meson-mx-usb2-phy";
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#phy-cells = <0>;
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reg = <0x8820 0x20>;
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status = "disabled";
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};
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sdio: mmc@8c20 {
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compatible = "amlogic,meson-mx-sdio";
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reg = <0x8c20 0x20>;
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interrupts = <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spifc: spi@8c80 {
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compatible = "amlogic,meson6-spifc";
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reg = <0x8c80 0x80>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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gpio_intc: interrupt-controller@9880 {
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compatible = "amlogic,meson-gpio-intc";
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reg = <0x9880 0x10>;
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interrupt-controller;
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#interrupt-cells = <2>;
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amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
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status = "disabled";
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};
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wdt: watchdog@9900 {
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compatible = "amlogic,meson6-wdt";
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reg = <0x9900 0x8>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
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};
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timer@9940 {
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compatible = "amlogic,meson6-timer";
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reg = <0x9940 0x18>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>;
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};
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};
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aobus: aobus@c8100000 {
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compatible = "simple-bus";
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reg = <0xc8100000 0x100000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0xc8100000 0x100000>;
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ir_receiver: ir-receiver@480 {
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compatible= "amlogic,meson6-ir";
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reg = <0x480 0x20>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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uart_AO: serial@4c0 {
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compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart";
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reg = <0x4c0 0x18>;
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interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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i2c_AO: i2c@500 {
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compatible = "amlogic,meson6-i2c";
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reg = <0x500 0x20>;
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interrupts = <GIC_SPI 92 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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usb0: usb@c9040000 {
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compatible = "snps,dwc2";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xc9040000 0x40000>;
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interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usb0_phy>;
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phy-names = "usb2-phy";
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dr_mode = "host";
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status = "disabled";
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};
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usb1: usb@c90c0000 {
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compatible = "snps,dwc2";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xc90c0000 0x40000>;
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interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usb1_phy>;
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phy-names = "usb2-phy";
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dr_mode = "host";
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status = "disabled";
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};
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ethmac: ethernet@c9410000 {
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compatible = "amlogic,meson6-dwmac", "snps,dwmac";
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reg = <0xc9410000 0x10000
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0xc1108108 0x4>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "macirq";
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status = "disabled";
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};
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ahb_sram: sram@d9000000 {
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compatible = "mmio-sram";
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reg = <0xd9000000 0x20000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0xd9000000 0x20000>;
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};
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bootrom: bootrom@d9040000 {
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compatible = "amlogic,meson-mx-bootrom", "syscon";
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reg = <0xd9040000 0x10000>;
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};
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secbus: secbus@da000000 {
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compatible = "simple-bus";
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reg = <0xda000000 0x6000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0xda000000 0x6000>;
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efuse: nvmem@0 {
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compatible = "amlogic,meson6-efuse";
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reg = <0x0 0x2000>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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};
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}; /* end of / */
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