mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 09:42:17 +07:00
6057d40f41
This patch adds a new GPIO driver for AMD Promontory chip. This GPIO controller is enumerated by ACPI and the ACPI compliant hardware ID is AMDF030. Change history: v2: 1. fix coding style 2. registers renaming v3: 1. change include file 2. fix coding style 3. remove module_init/exit, add module_platform_driver 4. remove MODULE_ALIAS v4: 1. change TOTAL_GPIO_PINS to PT_TOTAL_GPIO 2. remove PCI dependency in Kconfig 3. fix subject line Signed-off-by: YD Tseng <Yd_Tseng@asmedia.com.tw> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
262 lines
6.5 KiB
C
262 lines
6.5 KiB
C
/*
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* AMD Promontory GPIO driver
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*
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* Copyright (C) 2015 ASMedia Technology Inc.
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* Author: YD Tseng <yd_tseng@asmedia.com.tw>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/gpio/driver.h>
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#include <linux/spinlock.h>
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#include <linux/acpi.h>
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#include <linux/platform_device.h>
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#define PT_TOTAL_GPIO 8
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/* PCI-E MMIO register offsets */
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#define PT_DIRECTION_REG 0x00
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#define PT_INPUTDATA_REG 0x04
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#define PT_OUTPUTDATA_REG 0x08
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#define PT_CLOCKRATE_REG 0x0C
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#define PT_SYNC_REG 0x28
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struct pt_gpio_chip {
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struct gpio_chip gc;
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void __iomem *reg_base;
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spinlock_t lock;
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};
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#define to_pt_gpio(c) container_of(c, struct pt_gpio_chip, gc)
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static int pt_gpio_request(struct gpio_chip *gc, unsigned offset)
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{
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struct pt_gpio_chip *pt_gpio = to_pt_gpio(gc);
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unsigned long flags;
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u32 using_pins;
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dev_dbg(gc->dev, "pt_gpio_request offset=%x\n", offset);
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spin_lock_irqsave(&pt_gpio->lock, flags);
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using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
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if (using_pins & BIT(offset)) {
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dev_warn(gc->dev, "PT GPIO pin %x reconfigured\n",
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offset);
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spin_unlock_irqrestore(&pt_gpio->lock, flags);
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return -EINVAL;
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}
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writel(using_pins | BIT(offset), pt_gpio->reg_base + PT_SYNC_REG);
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spin_unlock_irqrestore(&pt_gpio->lock, flags);
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return 0;
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}
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static void pt_gpio_free(struct gpio_chip *gc, unsigned offset)
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{
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struct pt_gpio_chip *pt_gpio = to_pt_gpio(gc);
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unsigned long flags;
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u32 using_pins;
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spin_lock_irqsave(&pt_gpio->lock, flags);
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using_pins = readl(pt_gpio->reg_base + PT_SYNC_REG);
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using_pins &= ~BIT(offset);
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writel(using_pins, pt_gpio->reg_base + PT_SYNC_REG);
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spin_unlock_irqrestore(&pt_gpio->lock, flags);
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dev_dbg(gc->dev, "pt_gpio_free offset=%x\n", offset);
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}
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static void pt_gpio_set_value(struct gpio_chip *gc, unsigned offset, int value)
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{
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struct pt_gpio_chip *pt_gpio = to_pt_gpio(gc);
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unsigned long flags;
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u32 data;
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dev_dbg(gc->dev, "pt_gpio_set_value offset=%x, value=%x\n",
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offset, value);
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spin_lock_irqsave(&pt_gpio->lock, flags);
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data = readl(pt_gpio->reg_base + PT_OUTPUTDATA_REG);
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data &= ~BIT(offset);
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if (value)
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data |= BIT(offset);
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writel(data, pt_gpio->reg_base + PT_OUTPUTDATA_REG);
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spin_unlock_irqrestore(&pt_gpio->lock, flags);
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}
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static int pt_gpio_get_value(struct gpio_chip *gc, unsigned offset)
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{
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struct pt_gpio_chip *pt_gpio = to_pt_gpio(gc);
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unsigned long flags;
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u32 data;
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spin_lock_irqsave(&pt_gpio->lock, flags);
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data = readl(pt_gpio->reg_base + PT_DIRECTION_REG);
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/* configure as output */
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if (data & BIT(offset))
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data = readl(pt_gpio->reg_base + PT_OUTPUTDATA_REG);
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else /* configure as input */
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data = readl(pt_gpio->reg_base + PT_INPUTDATA_REG);
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spin_unlock_irqrestore(&pt_gpio->lock, flags);
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data >>= offset;
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data &= 1;
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dev_dbg(gc->dev, "pt_gpio_get_value offset=%x, value=%x\n",
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offset, data);
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return data;
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}
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static int pt_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
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{
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struct pt_gpio_chip *pt_gpio = to_pt_gpio(gc);
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unsigned long flags;
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u32 data;
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dev_dbg(gc->dev, "pt_gpio_dirction_input offset=%x\n", offset);
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spin_lock_irqsave(&pt_gpio->lock, flags);
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data = readl(pt_gpio->reg_base + PT_DIRECTION_REG);
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data &= ~BIT(offset);
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writel(data, pt_gpio->reg_base + PT_DIRECTION_REG);
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spin_unlock_irqrestore(&pt_gpio->lock, flags);
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return 0;
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}
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static int pt_gpio_direction_output(struct gpio_chip *gc,
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unsigned offset, int value)
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{
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struct pt_gpio_chip *pt_gpio = to_pt_gpio(gc);
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unsigned long flags;
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u32 data;
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dev_dbg(gc->dev, "pt_gpio_direction_output offset=%x, value=%x\n",
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offset, value);
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spin_lock_irqsave(&pt_gpio->lock, flags);
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data = readl(pt_gpio->reg_base + PT_OUTPUTDATA_REG);
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if (value)
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data |= BIT(offset);
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else
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data &= ~BIT(offset);
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writel(data, pt_gpio->reg_base + PT_OUTPUTDATA_REG);
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data = readl(pt_gpio->reg_base + PT_DIRECTION_REG);
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data |= BIT(offset);
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writel(data, pt_gpio->reg_base + PT_DIRECTION_REG);
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spin_unlock_irqrestore(&pt_gpio->lock, flags);
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return 0;
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}
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static int pt_gpio_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct acpi_device *acpi_dev;
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acpi_handle handle = ACPI_HANDLE(dev);
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struct pt_gpio_chip *pt_gpio;
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struct resource *res_mem;
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int ret = 0;
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if (acpi_bus_get_device(handle, &acpi_dev)) {
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dev_err(dev, "PT GPIO device node not found\n");
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return -ENODEV;
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}
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pt_gpio = devm_kzalloc(dev, sizeof(struct pt_gpio_chip), GFP_KERNEL);
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if (!pt_gpio)
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return -ENOMEM;
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res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res_mem) {
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dev_err(&pdev->dev, "Failed to get MMIO resource for PT GPIO.\n");
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return -EINVAL;
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}
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pt_gpio->reg_base = devm_ioremap_resource(dev, res_mem);
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if (IS_ERR(pt_gpio->reg_base)) {
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dev_err(&pdev->dev, "Failed to map MMIO resource for PT GPIO.\n");
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return PTR_ERR(pt_gpio->reg_base);
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}
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spin_lock_init(&pt_gpio->lock);
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pt_gpio->gc.label = pdev->name;
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pt_gpio->gc.owner = THIS_MODULE;
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pt_gpio->gc.dev = dev;
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pt_gpio->gc.request = pt_gpio_request;
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pt_gpio->gc.free = pt_gpio_free;
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pt_gpio->gc.direction_input = pt_gpio_direction_input;
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pt_gpio->gc.direction_output = pt_gpio_direction_output;
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pt_gpio->gc.get = pt_gpio_get_value;
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pt_gpio->gc.set = pt_gpio_set_value;
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pt_gpio->gc.base = -1;
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pt_gpio->gc.ngpio = PT_TOTAL_GPIO;
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#if defined(CONFIG_OF_GPIO)
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pt_gpio->gc.of_node = pdev->dev.of_node;
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#endif
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ret = gpiochip_add(&pt_gpio->gc);
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if (ret) {
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dev_err(&pdev->dev, "Failed to register GPIO lib\n");
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return ret;
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}
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platform_set_drvdata(pdev, pt_gpio);
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/* initialize register setting */
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writel(0, pt_gpio->reg_base + PT_SYNC_REG);
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writel(0, pt_gpio->reg_base + PT_CLOCKRATE_REG);
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dev_dbg(&pdev->dev, "PT GPIO driver loaded\n");
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return ret;
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}
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static int pt_gpio_remove(struct platform_device *pdev)
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{
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struct pt_gpio_chip *pt_gpio = platform_get_drvdata(pdev);
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gpiochip_remove(&pt_gpio->gc);
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return 0;
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}
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static const struct acpi_device_id pt_gpio_acpi_match[] = {
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{ "AMDF030", 0 },
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{ },
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};
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MODULE_DEVICE_TABLE(acpi, pt_gpio_acpi_match);
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static struct platform_driver pt_gpio_driver = {
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.driver = {
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.name = "pt-gpio",
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.acpi_match_table = ACPI_PTR(pt_gpio_acpi_match),
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},
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.probe = pt_gpio_probe,
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.remove = pt_gpio_remove,
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};
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module_platform_driver(pt_gpio_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("YD Tseng <yd_tseng@asmedia.com.tw>");
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MODULE_DESCRIPTION("AMD Promontory GPIO Driver");
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