Magnus Damm 1be8c9fd2a dt-bindings: timer: renesas, cmt: Update R-Car Gen3 CMT1 usage ... The R-Car Gen3 SoCs so far come with a total for 4 on-chip CMT devices: - CMT0 - CMT1 - CMT2 - CMT3 CMT0 includes two rather basic 32-bit timer channels. The rest of the on-chip CMT devices support 48-bit counters and have 8 channels each. Based on the data sheet information "CMT2/3 are exactly same as CMT1" it seems that CMT2 and CMT3 now use the CMT1 compat string in the DTSI. Clarify this in the DT binding documentation by describing R-Car Gen3 and RZ/G2 CMT1 as "48-bit CMT devices". Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>		2019-08-27 00:31:39 +02:00
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bindings	dt-bindings: timer: renesas, cmt: Update R-Car Gen3 CMT1 usage	2019-08-27 00:31:39 +02:00
booting-without-of.txt	docs: arm: convert docs to ReST and rename to *.rst	2019-07-15 09:20:24 -03:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt
overlay-notes.txt
usage-model.txt
writing-schema.md	dt-bindings: Update schema project location to devicetree.org github group	2019-05-01 14:27:58 -05:00