mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 08:26:49 +07:00
49b8c695e3
Reason for merge:
x86/fpu changed the structure of some of the code that x86/smap
changes; mostly fpu-internal.h but also minor changes to the
signal code.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Resolved Conflicts:
arch/x86/ia32/ia32_signal.c
arch/x86/include/asm/fpu-internal.h
arch/x86/kernel/signal.c
140 lines
3.4 KiB
C
140 lines
3.4 KiB
C
#ifndef __ASM_X86_XSAVE_H
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#define __ASM_X86_XSAVE_H
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#include <linux/types.h>
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#include <asm/processor.h>
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#define XSTATE_CPUID 0x0000000d
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#define XSTATE_FP 0x1
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#define XSTATE_SSE 0x2
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#define XSTATE_YMM 0x4
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#define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE)
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#define FXSAVE_SIZE 512
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#define XSAVE_HDR_SIZE 64
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#define XSAVE_HDR_OFFSET FXSAVE_SIZE
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#define XSAVE_YMM_SIZE 256
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#define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)
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/*
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* These are the features that the OS can handle currently.
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*/
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#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM)
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#ifdef CONFIG_X86_64
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#define REX_PREFIX "0x48, "
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#else
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#define REX_PREFIX
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#endif
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extern unsigned int xstate_size;
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extern u64 pcntxt_mask;
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extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
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extern struct xsave_struct *init_xstate_buf;
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extern void xsave_init(void);
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extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
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extern int init_fpu(struct task_struct *child);
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static inline int fpu_xrstor_checking(struct xsave_struct *fx)
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{
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int err;
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asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: [err] "=r" (err)
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: "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
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: "memory");
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return err;
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}
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static inline int xsave_user(struct xsave_struct __user *buf)
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{
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int err;
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/*
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* Clear the xsave header first, so that reserved fields are
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* initialized to zero.
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*/
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err = __clear_user(&buf->xsave_hdr, sizeof(buf->xsave_hdr));
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if (unlikely(err))
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return -EFAULT;
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__asm__ __volatile__(ASM_STAC "\n"
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"1: .byte " REX_PREFIX "0x0f,0xae,0x27\n"
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"2: " ASM_CLAC "\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b,3b)
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: [err] "=r" (err)
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: "D" (buf), "a" (-1), "d" (-1), "0" (0)
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: "memory");
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return err;
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}
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static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask)
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{
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int err;
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struct xsave_struct *xstate = ((__force struct xsave_struct *)buf);
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u32 lmask = mask;
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u32 hmask = mask >> 32;
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__asm__ __volatile__(ASM_STAC "\n"
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"1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n"
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"2: " ASM_CLAC "\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b,3b)
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: [err] "=r" (err)
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: "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)
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: "memory"); /* memory required? */
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return err;
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}
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static inline void xrstor_state(struct xsave_struct *fx, u64 mask)
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{
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u32 lmask = mask;
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u32 hmask = mask >> 32;
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asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
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: : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
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: "memory");
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}
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static inline void xsave_state(struct xsave_struct *fx, u64 mask)
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{
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u32 lmask = mask;
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u32 hmask = mask >> 32;
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asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x27\n\t"
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: : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
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: "memory");
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}
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static inline void fpu_xsave(struct fpu *fpu)
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{
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/* This, however, we can work around by forcing the compiler to select
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an addressing mode that doesn't require extended registers. */
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alternative_input(
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".byte " REX_PREFIX "0x0f,0xae,0x27",
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".byte " REX_PREFIX "0x0f,0xae,0x37",
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X86_FEATURE_XSAVEOPT,
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[fx] "D" (&fpu->state->xsave), "a" (-1), "d" (-1) :
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"memory");
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}
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#endif
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