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This header contains definitions for the memory controller found on NVIDIA Tegra194 SoCs, such as the stream IDs used for the ARM SMMU and the IDs used to identify the various memory clients. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> |
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mt2701-larb-port.h | ||
mt2712-larb-port.h | ||
mt8173-larb-port.h | ||
mt8183-larb-port.h | ||
tegra20-mc.h | ||
tegra30-mc.h | ||
tegra114-mc.h | ||
tegra124-mc.h | ||
tegra186-mc.h | ||
tegra194-mc.h | ||
tegra210-mc.h |