Nicolas Ferre df70aeef60 clk: at91: add generated clock driver ... Add a new type of clocks that can be provided to a peripheral. In addition to the peripheral clock, this new clock that can use several input clocks as parents can generate divided rates. This would allow a peripheral to have finer grained clocks for generating a baud rate, clocking an asynchronous part or having more options in frequency. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [sboyd@codeaurora.org: Transition to new clk_hw provider APIs] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>		2015-10-01 12:48:11 -07:00
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at91_pmc.h	clk: at91: add generated clock driver	2015-10-01 12:48:11 -07:00
bcm2835.h
clk-conf.h	clk: Add missing header for 'bool' definition to clk-conf.h	2015-08-25 10:54:06 -07:00
mxs.h	ARM: mxs: remove custom .init_time hook	2013-09-29 21:09:34 +02:00
shmobile.h	clk: shmobile: Add CPG/MSTP Clock Domain support	2015-08-12 10:31:26 +09:00
tegra.h	clk: tegra: Properly include clk.h	2015-07-20 11:11:17 -07:00
ti.h	ARM: SoC platform updates for v4.3	2015-09-01 12:18:40 -07:00
zynq.h	ARM: zynq: Map I/O memory on clkc init	2014-02-10 11:21:13 +01:00