Will Deacon 202fb4ef81 arm64: spinlock: Fix theoretical trylock() A-B-A with LSE atomics ... If the spinlock "next" ticket wraps around between the initial LDR and the cmpxchg in the LSE version of spin_trylock, then we can erroneously think that we have successfuly acquired the lock because we only check whether the next ticket return by the cmpxchg is equal to the owner ticket in our updated lock word. This patch fixes the issue by performing a full 32-bit check of the lock word when trying to determine whether or not the CASA instruction updated memory. Reported-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>		2018-02-06 22:53:11 +00:00
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asm	arm64: spinlock: Fix theoretical trylock() A-B-A with LSE atomics	2018-02-06 22:53:11 +00:00
uapi/asm	arm64: v8.4: Support for new floating point multiplication instructions	2018-01-05 11:29:48 +00:00