mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 03:46:42 +07:00
f880c5649e
The existing MSM irq entry macro is specific to a VIC implementation. Renaming this makes room for irq support based on other interrupt controllers. Signed-off-by: Steve Muckle <smuckle@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
38 lines
1.0 KiB
ArmAsm
38 lines
1.0 KiB
ArmAsm
/*
|
|
* Copyright (C) 2007 Google, Inc.
|
|
* Author: Brian Swetland <swetland@google.com>
|
|
*
|
|
* This software is licensed under the terms of the GNU General Public
|
|
* License version 2, as published by the Free Software Foundation, and
|
|
* may be copied, distributed, and modified under those terms.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
*/
|
|
|
|
#include <mach/msm_iomap.h>
|
|
|
|
.macro disable_fiq
|
|
.endm
|
|
|
|
.macro get_irqnr_preamble, base, tmp
|
|
@ enable imprecise aborts
|
|
cpsie a
|
|
mov \base, #MSM_VIC_BASE
|
|
.endm
|
|
|
|
.macro arch_ret_to_user, tmp1, tmp2
|
|
.endm
|
|
|
|
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
|
|
@ 0xD0 has irq# or old irq# if the irq has been handled
|
|
@ 0xD4 has irq# or -1 if none pending *but* if you just
|
|
@ read 0xD4 you never get the first irq for some reason
|
|
ldr \irqnr, [\base, #0xD0]
|
|
ldr \irqnr, [\base, #0xD4]
|
|
cmp \irqnr, #0xffffffff
|
|
.endm
|