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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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66396583e1
When we want to trigger an NMI in the device, we need to set bit 7 and not bit 0. However, older firmwares don't register to the interrupt issued by bit 7. Use bit 7 first so that the correct interrupt will be issued hoping that the firmware will react. To be on the safe side, set bit 0 in case the firmware didn't register to the proper interrupt. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
272 lines
6.9 KiB
C
272 lines
6.9 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
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*
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* Portions of this file are derived from the ipw3945 project.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* Intel Linux Wireless <ilw@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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*****************************************************************************/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/export.h>
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#include "iwl-drv.h"
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#include "iwl-io.h"
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#include "iwl-csr.h"
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#include "iwl-debug.h"
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#include "iwl-prph.h"
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#include "iwl-fh.h"
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#define IWL_POLL_INTERVAL 10 /* microseconds */
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int iwl_poll_bit(struct iwl_trans *trans, u32 addr,
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u32 bits, u32 mask, int timeout)
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{
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int t = 0;
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do {
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if ((iwl_read32(trans, addr) & mask) == (bits & mask))
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return t;
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udelay(IWL_POLL_INTERVAL);
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t += IWL_POLL_INTERVAL;
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} while (t < timeout);
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return -ETIMEDOUT;
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}
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IWL_EXPORT_SYMBOL(iwl_poll_bit);
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u32 iwl_read_direct32(struct iwl_trans *trans, u32 reg)
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{
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u32 value = 0x5a5a5a5a;
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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value = iwl_read32(trans, reg);
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iwl_trans_release_nic_access(trans, &flags);
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}
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return value;
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}
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IWL_EXPORT_SYMBOL(iwl_read_direct32);
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void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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iwl_write32(trans, reg, value);
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iwl_trans_release_nic_access(trans, &flags);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_write_direct32);
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int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask,
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int timeout)
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{
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int t = 0;
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do {
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if ((iwl_read_direct32(trans, addr) & mask) == mask)
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return t;
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udelay(IWL_POLL_INTERVAL);
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t += IWL_POLL_INTERVAL;
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} while (t < timeout);
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return -ETIMEDOUT;
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}
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IWL_EXPORT_SYMBOL(iwl_poll_direct_bit);
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u32 __iwl_read_prph(struct iwl_trans *trans, u32 ofs)
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{
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u32 val = iwl_trans_read_prph(trans, ofs);
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trace_iwlwifi_dev_ioread_prph32(trans->dev, ofs, val);
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return val;
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}
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void __iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
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{
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trace_iwlwifi_dev_iowrite_prph32(trans->dev, ofs, val);
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iwl_trans_write_prph(trans, ofs, val);
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}
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u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs)
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{
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unsigned long flags;
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u32 val = 0x5a5a5a5a;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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val = __iwl_read_prph(trans, ofs);
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iwl_trans_release_nic_access(trans, &flags);
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}
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return val;
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}
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IWL_EXPORT_SYMBOL(iwl_read_prph);
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void iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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__iwl_write_prph(trans, ofs, val);
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iwl_trans_release_nic_access(trans, &flags);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_write_prph);
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int iwl_poll_prph_bit(struct iwl_trans *trans, u32 addr,
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u32 bits, u32 mask, int timeout)
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{
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int t = 0;
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do {
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if ((iwl_read_prph(trans, addr) & mask) == (bits & mask))
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return t;
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udelay(IWL_POLL_INTERVAL);
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t += IWL_POLL_INTERVAL;
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} while (t < timeout);
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return -ETIMEDOUT;
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}
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void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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__iwl_write_prph(trans, ofs,
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__iwl_read_prph(trans, ofs) | mask);
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iwl_trans_release_nic_access(trans, &flags);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_set_bits_prph);
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void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
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u32 bits, u32 mask)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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__iwl_write_prph(trans, ofs,
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(__iwl_read_prph(trans, ofs) & mask) | bits);
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iwl_trans_release_nic_access(trans, &flags);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_set_bits_mask_prph);
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void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
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{
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unsigned long flags;
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u32 val;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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val = __iwl_read_prph(trans, ofs);
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__iwl_write_prph(trans, ofs, (val & ~mask));
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iwl_trans_release_nic_access(trans, &flags);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_clear_bits_prph);
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void iwl_force_nmi(struct iwl_trans *trans)
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{
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/*
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* In HW previous to the 8000 HW family, and in the 8000 HW family
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* itself when the revision step==0, the DEVICE_SET_NMI_REG is used
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* to force an NMI. Otherwise, a different register -
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* DEVICE_SET_NMI_8000B_REG - is used.
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*/
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if ((trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) ||
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(CSR_HW_REV_STEP(trans->hw_rev) == SILICON_A_STEP)) {
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iwl_write_prph(trans, DEVICE_SET_NMI_REG,
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DEVICE_SET_NMI_VAL_DRV);
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iwl_write_prph(trans, DEVICE_SET_NMI_REG,
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DEVICE_SET_NMI_VAL_HW);
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} else {
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iwl_write_prph(trans, DEVICE_SET_NMI_8000B_REG,
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DEVICE_SET_NMI_8000B_VAL);
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}
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}
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IWL_EXPORT_SYMBOL(iwl_force_nmi);
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static const char *get_fh_string(int cmd)
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{
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#define IWL_CMD(x) case x: return #x
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switch (cmd) {
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IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
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IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
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IWL_CMD(FH_RSCSR_CHNL0_WPTR);
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IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
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IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
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IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
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IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
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IWL_CMD(FH_TSSR_TX_STATUS_REG);
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IWL_CMD(FH_TSSR_TX_ERROR_REG);
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default:
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return "UNKNOWN";
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}
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#undef IWL_CMD
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}
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int iwl_dump_fh(struct iwl_trans *trans, char **buf)
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{
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int i;
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static const u32 fh_tbl[] = {
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FH_RSCSR_CHNL0_STTS_WPTR_REG,
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FH_RSCSR_CHNL0_RBDCB_BASE_REG,
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FH_RSCSR_CHNL0_WPTR,
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FH_MEM_RCSR_CHNL0_CONFIG_REG,
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FH_MEM_RSSR_SHARED_CTRL_REG,
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FH_MEM_RSSR_RX_STATUS_REG,
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FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
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FH_TSSR_TX_STATUS_REG,
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FH_TSSR_TX_ERROR_REG
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};
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#ifdef CONFIG_IWLWIFI_DEBUGFS
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if (buf) {
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int pos = 0;
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size_t bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
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*buf = kmalloc(bufsz, GFP_KERNEL);
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if (!*buf)
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return -ENOMEM;
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pos += scnprintf(*buf + pos, bufsz - pos,
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"FH register values:\n");
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for (i = 0; i < ARRAY_SIZE(fh_tbl); i++)
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pos += scnprintf(*buf + pos, bufsz - pos,
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" %34s: 0X%08x\n",
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get_fh_string(fh_tbl[i]),
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iwl_read_direct32(trans, fh_tbl[i]));
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return pos;
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}
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#endif
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IWL_ERR(trans, "FH register values:\n");
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for (i = 0; i < ARRAY_SIZE(fh_tbl); i++)
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IWL_ERR(trans, " %34s: 0X%08x\n",
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get_fh_string(fh_tbl[i]),
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iwl_read_direct32(trans, fh_tbl[i]));
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return 0;
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}
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