Matthias Kaehlcke 1f5e928340 ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger ... The flash write protect pin is currently named 'FW_WP_AP', which is how the signal is called in the schematics. The Chrome OS ABI requires the pin to be named 'AP_FLASH_WP_L', which is also how it is called on all other veyron devices. Rename the pin to match the ABI. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200106135142.1.I3f99ac8399a564c88ff48ae6290cc691b47c16ae@changeid Signed-off-by: Heiko Stuebner <heiko@sntech.de>		2020-01-07 22:52:40 +01:00
..
bootp	ARM: 8933/1: replace Sun/Solaris style flag on section directive	2019-11-15 22:21:19 +00:00
compressed	Devicetree updates for v5.5:	2019-12-02 11:41:35 -08:00
dts	ARM: dts: rockchip: Use ABI name for write protect pin on veyron fievel/tiger	2020-01-07 22:52:40 +01:00
.gitignore
deflate_xip_data.sh
install.sh
Makefile