mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 19:36:44 +07:00
03dae7c567
There are no users left in drivers/gpu. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Andy Lutomirski <luto@amacapital.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
103 lines
3.2 KiB
C
103 lines
3.2 KiB
C
/**
|
|
* \file drm_os_linux.h
|
|
* OS abstraction macros.
|
|
*/
|
|
|
|
#include <linux/interrupt.h> /* For task queue support */
|
|
#include <linux/delay.h>
|
|
|
|
#ifndef readq
|
|
static inline u64 readq(void __iomem *reg)
|
|
{
|
|
return ((u64) readl(reg)) | (((u64) readl(reg + 4UL)) << 32);
|
|
}
|
|
|
|
static inline void writeq(u64 val, void __iomem *reg)
|
|
{
|
|
writel(val & 0xffffffff, reg);
|
|
writel(val >> 32, reg + 0x4UL);
|
|
}
|
|
#endif
|
|
|
|
/** Current process ID */
|
|
#define DRM_CURRENTPID task_pid_nr(current)
|
|
#define DRM_SUSER(p) capable(CAP_SYS_ADMIN)
|
|
#define DRM_UDELAY(d) udelay(d)
|
|
/** Read a byte from a MMIO region */
|
|
#define DRM_READ8(map, offset) readb(((void __iomem *)(map)->handle) + (offset))
|
|
/** Read a word from a MMIO region */
|
|
#define DRM_READ16(map, offset) readw(((void __iomem *)(map)->handle) + (offset))
|
|
/** Read a dword from a MMIO region */
|
|
#define DRM_READ32(map, offset) readl(((void __iomem *)(map)->handle) + (offset))
|
|
/** Write a byte into a MMIO region */
|
|
#define DRM_WRITE8(map, offset, val) writeb(val, ((void __iomem *)(map)->handle) + (offset))
|
|
/** Write a word into a MMIO region */
|
|
#define DRM_WRITE16(map, offset, val) writew(val, ((void __iomem *)(map)->handle) + (offset))
|
|
/** Write a dword into a MMIO region */
|
|
#define DRM_WRITE32(map, offset, val) writel(val, ((void __iomem *)(map)->handle) + (offset))
|
|
/** Read memory barrier */
|
|
|
|
/** Read a qword from a MMIO region - be careful using these unless you really understand them */
|
|
#define DRM_READ64(map, offset) readq(((void __iomem *)(map)->handle) + (offset))
|
|
/** Write a qword into a MMIO region */
|
|
#define DRM_WRITE64(map, offset, val) writeq(val, ((void __iomem *)(map)->handle) + (offset))
|
|
|
|
#define DRM_READMEMORYBARRIER() rmb()
|
|
/** Write memory barrier */
|
|
#define DRM_WRITEMEMORYBARRIER() wmb()
|
|
/** Read/write memory barrier */
|
|
#define DRM_MEMORYBARRIER() mb()
|
|
|
|
/** IRQ handler arguments and return type and values */
|
|
#define DRM_IRQ_ARGS int irq, void *arg
|
|
|
|
/** AGP types */
|
|
#if __OS_HAS_AGP
|
|
#define DRM_AGP_MEM struct agp_memory
|
|
#define DRM_AGP_KERN struct agp_kern_info
|
|
#else
|
|
/* define some dummy types for non AGP supporting kernels */
|
|
struct no_agp_kern {
|
|
unsigned long aper_base;
|
|
unsigned long aper_size;
|
|
};
|
|
#define DRM_AGP_MEM int
|
|
#define DRM_AGP_KERN struct no_agp_kern
|
|
#endif
|
|
|
|
/** Other copying of data to kernel space */
|
|
#define DRM_COPY_FROM_USER(arg1, arg2, arg3) \
|
|
copy_from_user(arg1, arg2, arg3)
|
|
/** Other copying of data from kernel space */
|
|
#define DRM_COPY_TO_USER(arg1, arg2, arg3) \
|
|
copy_to_user(arg1, arg2, arg3)
|
|
|
|
#define DRM_HZ HZ
|
|
|
|
#define DRM_WAIT_ON( ret, queue, timeout, condition ) \
|
|
do { \
|
|
DECLARE_WAITQUEUE(entry, current); \
|
|
unsigned long end = jiffies + (timeout); \
|
|
add_wait_queue(&(queue), &entry); \
|
|
\
|
|
for (;;) { \
|
|
__set_current_state(TASK_INTERRUPTIBLE); \
|
|
if (condition) \
|
|
break; \
|
|
if (time_after_eq(jiffies, end)) { \
|
|
ret = -EBUSY; \
|
|
break; \
|
|
} \
|
|
schedule_timeout((HZ/100 > 1) ? HZ/100 : 1); \
|
|
if (signal_pending(current)) { \
|
|
ret = -EINTR; \
|
|
break; \
|
|
} \
|
|
} \
|
|
__set_current_state(TASK_RUNNING); \
|
|
remove_wait_queue(&(queue), &entry); \
|
|
} while (0)
|
|
|
|
#define DRM_WAKEUP( queue ) wake_up( queue )
|
|
#define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue )
|