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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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1efdd4bd25
Some platforms execute their timer handler with the interrupt priority level set below 6. That means the handler could be interrupted by another driver and this could lead to re-entry of the timer core. Avoid this by use of local_irq_save/restore for timer interrupt dispatch. This provides mutual exclusion around the timer interrupt flag access which is needed later in this series for the clocksource conversion. Reported-by: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/alpine.DEB.2.21.1811131407120.2697@nanos.tec.linutronix.de Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
307 lines
7.9 KiB
C
307 lines
7.9 KiB
C
/*
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* linux/arch/m68k/atari/time.c
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*
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* Atari time and real time clock stuff
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*
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* Assembled of parts of former atari/config.c 97-12-18 by Roman Hodek
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*/
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#include <linux/types.h>
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#include <linux/mc146818rtc.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/rtc.h>
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#include <linux/bcd.h>
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#include <linux/delay.h>
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#include <linux/export.h>
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#include <asm/atariints.h>
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL_GPL(rtc_lock);
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static irqreturn_t mfp_timer_c_handler(int irq, void *dev_id)
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{
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irq_handler_t timer_routine = dev_id;
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unsigned long flags;
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local_irq_save(flags);
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timer_routine(0, NULL);
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local_irq_restore(flags);
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return IRQ_HANDLED;
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}
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void __init
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atari_sched_init(irq_handler_t timer_routine)
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{
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/* set Timer C data Register */
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st_mfp.tim_dt_c = INT_TICKS;
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/* start timer C, div = 1:100 */
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st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 15) | 0x60;
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/* install interrupt service routine for MFP Timer C */
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if (request_irq(IRQ_MFP_TIMC, mfp_timer_c_handler, 0, "timer",
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timer_routine))
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pr_err("Couldn't register timer interrupt\n");
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}
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/* ++andreas: gettimeoffset fixed to check for pending interrupt */
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#define TICK_SIZE 10000
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/* This is always executed with interrupts disabled. */
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u32 atari_gettimeoffset(void)
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{
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u32 ticks, offset = 0;
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/* read MFP timer C current value */
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ticks = st_mfp.tim_dt_c;
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/* The probability of underflow is less than 2% */
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if (ticks > INT_TICKS - INT_TICKS / 50)
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/* Check for pending timer interrupt */
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if (st_mfp.int_pn_b & (1 << 5))
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offset = TICK_SIZE;
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ticks = INT_TICKS - ticks;
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ticks = ticks * 10000L / INT_TICKS;
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return (ticks + offset) * 1000;
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}
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static void mste_read(struct MSTE_RTC *val)
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{
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#define COPY(v) val->v=(mste_rtc.v & 0xf)
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do {
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COPY(sec_ones) ; COPY(sec_tens) ; COPY(min_ones) ;
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COPY(min_tens) ; COPY(hr_ones) ; COPY(hr_tens) ;
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COPY(weekday) ; COPY(day_ones) ; COPY(day_tens) ;
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COPY(mon_ones) ; COPY(mon_tens) ; COPY(year_ones) ;
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COPY(year_tens) ;
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/* prevent from reading the clock while it changed */
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} while (val->sec_ones != (mste_rtc.sec_ones & 0xf));
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#undef COPY
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}
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static void mste_write(struct MSTE_RTC *val)
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{
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#define COPY(v) mste_rtc.v=val->v
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do {
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COPY(sec_ones) ; COPY(sec_tens) ; COPY(min_ones) ;
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COPY(min_tens) ; COPY(hr_ones) ; COPY(hr_tens) ;
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COPY(weekday) ; COPY(day_ones) ; COPY(day_tens) ;
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COPY(mon_ones) ; COPY(mon_tens) ; COPY(year_ones) ;
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COPY(year_tens) ;
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/* prevent from writing the clock while it changed */
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} while (val->sec_ones != (mste_rtc.sec_ones & 0xf));
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#undef COPY
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}
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#define RTC_READ(reg) \
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({ unsigned char __val; \
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(void) atari_writeb(reg,&tt_rtc.regsel); \
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__val = tt_rtc.data; \
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__val; \
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})
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#define RTC_WRITE(reg,val) \
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do { \
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atari_writeb(reg,&tt_rtc.regsel); \
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tt_rtc.data = (val); \
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} while(0)
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#define HWCLK_POLL_INTERVAL 5
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int atari_mste_hwclk( int op, struct rtc_time *t )
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{
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int hour, year;
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int hr24=0;
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struct MSTE_RTC val;
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mste_rtc.mode=(mste_rtc.mode | 1);
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hr24=mste_rtc.mon_tens & 1;
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mste_rtc.mode=(mste_rtc.mode & ~1);
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if (op) {
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/* write: prepare values */
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val.sec_ones = t->tm_sec % 10;
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val.sec_tens = t->tm_sec / 10;
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val.min_ones = t->tm_min % 10;
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val.min_tens = t->tm_min / 10;
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hour = t->tm_hour;
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if (!hr24) {
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if (hour > 11)
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hour += 20 - 12;
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if (hour == 0 || hour == 20)
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hour += 12;
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}
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val.hr_ones = hour % 10;
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val.hr_tens = hour / 10;
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val.day_ones = t->tm_mday % 10;
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val.day_tens = t->tm_mday / 10;
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val.mon_ones = (t->tm_mon+1) % 10;
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val.mon_tens = (t->tm_mon+1) / 10;
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year = t->tm_year - 80;
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val.year_ones = year % 10;
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val.year_tens = year / 10;
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val.weekday = t->tm_wday;
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mste_write(&val);
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mste_rtc.mode=(mste_rtc.mode | 1);
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val.year_ones = (year % 4); /* leap year register */
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mste_rtc.mode=(mste_rtc.mode & ~1);
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}
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else {
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mste_read(&val);
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t->tm_sec = val.sec_ones + val.sec_tens * 10;
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t->tm_min = val.min_ones + val.min_tens * 10;
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hour = val.hr_ones + val.hr_tens * 10;
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if (!hr24) {
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if (hour == 12 || hour == 12 + 20)
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hour -= 12;
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if (hour >= 20)
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hour += 12 - 20;
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}
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t->tm_hour = hour;
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t->tm_mday = val.day_ones + val.day_tens * 10;
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t->tm_mon = val.mon_ones + val.mon_tens * 10 - 1;
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t->tm_year = val.year_ones + val.year_tens * 10 + 80;
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t->tm_wday = val.weekday;
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}
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return 0;
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}
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int atari_tt_hwclk( int op, struct rtc_time *t )
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{
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int sec=0, min=0, hour=0, day=0, mon=0, year=0, wday=0;
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unsigned long flags;
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unsigned char ctrl;
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int pm = 0;
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ctrl = RTC_READ(RTC_CONTROL); /* control registers are
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* independent from the UIP */
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if (op) {
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/* write: prepare values */
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sec = t->tm_sec;
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min = t->tm_min;
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hour = t->tm_hour;
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day = t->tm_mday;
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mon = t->tm_mon + 1;
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year = t->tm_year - atari_rtc_year_offset;
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wday = t->tm_wday + (t->tm_wday >= 0);
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if (!(ctrl & RTC_24H)) {
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if (hour > 11) {
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pm = 0x80;
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if (hour != 12)
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hour -= 12;
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}
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else if (hour == 0)
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hour = 12;
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}
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if (!(ctrl & RTC_DM_BINARY)) {
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sec = bin2bcd(sec);
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min = bin2bcd(min);
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hour = bin2bcd(hour);
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day = bin2bcd(day);
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mon = bin2bcd(mon);
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year = bin2bcd(year);
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if (wday >= 0)
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wday = bin2bcd(wday);
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}
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}
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/* Reading/writing the clock registers is a bit critical due to
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* the regular update cycle of the RTC. While an update is in
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* progress, registers 0..9 shouldn't be touched.
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* The problem is solved like that: If an update is currently in
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* progress (the UIP bit is set), the process sleeps for a while
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* (50ms). This really should be enough, since the update cycle
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* normally needs 2 ms.
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* If the UIP bit reads as 0, we have at least 244 usecs until the
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* update starts. This should be enough... But to be sure,
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* additionally the RTC_SET bit is set to prevent an update cycle.
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*/
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while( RTC_READ(RTC_FREQ_SELECT) & RTC_UIP ) {
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if (in_atomic() || irqs_disabled())
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mdelay(1);
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else
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schedule_timeout_interruptible(HWCLK_POLL_INTERVAL);
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}
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local_irq_save(flags);
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RTC_WRITE( RTC_CONTROL, ctrl | RTC_SET );
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if (!op) {
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sec = RTC_READ( RTC_SECONDS );
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min = RTC_READ( RTC_MINUTES );
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hour = RTC_READ( RTC_HOURS );
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day = RTC_READ( RTC_DAY_OF_MONTH );
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mon = RTC_READ( RTC_MONTH );
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year = RTC_READ( RTC_YEAR );
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wday = RTC_READ( RTC_DAY_OF_WEEK );
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}
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else {
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RTC_WRITE( RTC_SECONDS, sec );
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RTC_WRITE( RTC_MINUTES, min );
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RTC_WRITE( RTC_HOURS, hour + pm);
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RTC_WRITE( RTC_DAY_OF_MONTH, day );
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RTC_WRITE( RTC_MONTH, mon );
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RTC_WRITE( RTC_YEAR, year );
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if (wday >= 0) RTC_WRITE( RTC_DAY_OF_WEEK, wday );
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}
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RTC_WRITE( RTC_CONTROL, ctrl & ~RTC_SET );
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local_irq_restore(flags);
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if (!op) {
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/* read: adjust values */
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if (hour & 0x80) {
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hour &= ~0x80;
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pm = 1;
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}
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if (!(ctrl & RTC_DM_BINARY)) {
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sec = bcd2bin(sec);
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min = bcd2bin(min);
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hour = bcd2bin(hour);
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day = bcd2bin(day);
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mon = bcd2bin(mon);
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year = bcd2bin(year);
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wday = bcd2bin(wday);
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}
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if (!(ctrl & RTC_24H)) {
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if (!pm && hour == 12)
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hour = 0;
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else if (pm && hour != 12)
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hour += 12;
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}
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t->tm_sec = sec;
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t->tm_min = min;
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t->tm_hour = hour;
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t->tm_mday = day;
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t->tm_mon = mon - 1;
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t->tm_year = year + atari_rtc_year_offset;
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t->tm_wday = wday - 1;
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}
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return( 0 );
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}
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/*
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* Local variables:
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* c-indent-level: 4
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* tab-width: 8
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* End:
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*/
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