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c02607aad2
Some IOMMUs, such as the ARM SMMU, support two stages of translation. The idea behind such a scheme is to allow a guest operating system to use the IOMMU for DMA mappings in the first stage of translation, with the hypervisor then installing mappings in the second stage to provide isolation of the DMA to the physical range assigned to that virtual machine. In order to allow IOMMU domains to be used for second-stage translation, this patch adds a new iommu_attr (IOMMU_ATTR_NESTING) for setting second-stage domains prior to device attach. The attribute can also be queried to see if a domain is actually making use of nesting. Acked-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
431 lines
13 KiB
C
431 lines
13 KiB
C
/*
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* Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
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* Author: Joerg Roedel <joerg.roedel@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __LINUX_IOMMU_H
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#define __LINUX_IOMMU_H
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/types.h>
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#include <trace/events/iommu.h>
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#define IOMMU_READ (1 << 0)
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#define IOMMU_WRITE (1 << 1)
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#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
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#define IOMMU_EXEC (1 << 3)
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struct iommu_ops;
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struct iommu_group;
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struct bus_type;
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struct device;
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struct iommu_domain;
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struct notifier_block;
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/* iommu fault flags */
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#define IOMMU_FAULT_READ 0x0
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#define IOMMU_FAULT_WRITE 0x1
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typedef int (*iommu_fault_handler_t)(struct iommu_domain *,
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struct device *, unsigned long, int, void *);
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struct iommu_domain_geometry {
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dma_addr_t aperture_start; /* First address that can be mapped */
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dma_addr_t aperture_end; /* Last address that can be mapped */
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bool force_aperture; /* DMA only allowed in mappable range? */
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};
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struct iommu_domain {
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const struct iommu_ops *ops;
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void *priv;
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iommu_fault_handler_t handler;
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void *handler_token;
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struct iommu_domain_geometry geometry;
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};
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#define IOMMU_CAP_CACHE_COHERENCY 0x1
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#define IOMMU_CAP_INTR_REMAP 0x2 /* isolates device intrs */
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/*
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* Following constraints are specifc to FSL_PAMUV1:
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* -aperture must be power of 2, and naturally aligned
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* -number of windows must be power of 2, and address space size
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* of each window is determined by aperture size / # of windows
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* -the actual size of the mapped region of a window must be power
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* of 2 starting with 4KB and physical address must be naturally
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* aligned.
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* DOMAIN_ATTR_FSL_PAMUV1 corresponds to the above mentioned contraints.
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* The caller can invoke iommu_domain_get_attr to check if the underlying
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* iommu implementation supports these constraints.
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*/
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enum iommu_attr {
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DOMAIN_ATTR_GEOMETRY,
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DOMAIN_ATTR_PAGING,
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DOMAIN_ATTR_WINDOWS,
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DOMAIN_ATTR_FSL_PAMU_STASH,
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DOMAIN_ATTR_FSL_PAMU_ENABLE,
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DOMAIN_ATTR_FSL_PAMUV1,
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DOMAIN_ATTR_NESTING, /* two stages of translation */
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DOMAIN_ATTR_MAX,
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};
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#ifdef CONFIG_IOMMU_API
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/**
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* struct iommu_ops - iommu ops and capabilities
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* @domain_init: init iommu domain
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* @domain_destroy: destroy iommu domain
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* @attach_dev: attach device to an iommu domain
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* @detach_dev: detach device from an iommu domain
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* @map: map a physically contiguous memory region to an iommu domain
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* @unmap: unmap a physically contiguous memory region from an iommu domain
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* @iova_to_phys: translate iova to physical address
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* @domain_has_cap: domain capabilities query
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* @add_device: add device to iommu grouping
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* @remove_device: remove device from iommu grouping
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* @domain_get_attr: Query domain attributes
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* @domain_set_attr: Change domain attributes
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* @pgsize_bitmap: bitmap of supported page sizes
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*/
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struct iommu_ops {
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int (*domain_init)(struct iommu_domain *domain);
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void (*domain_destroy)(struct iommu_domain *domain);
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int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
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void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
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int (*map)(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, size_t size, int prot);
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size_t (*unmap)(struct iommu_domain *domain, unsigned long iova,
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size_t size);
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phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova);
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int (*domain_has_cap)(struct iommu_domain *domain,
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unsigned long cap);
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int (*add_device)(struct device *dev);
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void (*remove_device)(struct device *dev);
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int (*device_group)(struct device *dev, unsigned int *groupid);
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int (*domain_get_attr)(struct iommu_domain *domain,
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enum iommu_attr attr, void *data);
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int (*domain_set_attr)(struct iommu_domain *domain,
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enum iommu_attr attr, void *data);
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/* Window handling functions */
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int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr,
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phys_addr_t paddr, u64 size, int prot);
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void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr);
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/* Set the numer of window per domain */
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int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count);
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/* Get the numer of window per domain */
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u32 (*domain_get_windows)(struct iommu_domain *domain);
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unsigned long pgsize_bitmap;
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};
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#define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */
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#define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */
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#define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */
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#define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */
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#define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */
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#define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */
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extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops);
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extern bool iommu_present(struct bus_type *bus);
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extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus);
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extern struct iommu_group *iommu_group_get_by_id(int id);
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extern void iommu_domain_free(struct iommu_domain *domain);
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extern int iommu_attach_device(struct iommu_domain *domain,
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struct device *dev);
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extern void iommu_detach_device(struct iommu_domain *domain,
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struct device *dev);
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extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, size_t size, int prot);
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extern size_t iommu_unmap(struct iommu_domain *domain, unsigned long iova,
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size_t size);
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extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova);
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extern int iommu_domain_has_cap(struct iommu_domain *domain,
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unsigned long cap);
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extern void iommu_set_fault_handler(struct iommu_domain *domain,
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iommu_fault_handler_t handler, void *token);
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extern int iommu_attach_group(struct iommu_domain *domain,
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struct iommu_group *group);
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extern void iommu_detach_group(struct iommu_domain *domain,
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struct iommu_group *group);
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extern struct iommu_group *iommu_group_alloc(void);
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extern void *iommu_group_get_iommudata(struct iommu_group *group);
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extern void iommu_group_set_iommudata(struct iommu_group *group,
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void *iommu_data,
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void (*release)(void *iommu_data));
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extern int iommu_group_set_name(struct iommu_group *group, const char *name);
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extern int iommu_group_add_device(struct iommu_group *group,
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struct device *dev);
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extern void iommu_group_remove_device(struct device *dev);
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extern int iommu_group_for_each_dev(struct iommu_group *group, void *data,
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int (*fn)(struct device *, void *));
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extern struct iommu_group *iommu_group_get(struct device *dev);
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extern void iommu_group_put(struct iommu_group *group);
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extern int iommu_group_register_notifier(struct iommu_group *group,
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struct notifier_block *nb);
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extern int iommu_group_unregister_notifier(struct iommu_group *group,
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struct notifier_block *nb);
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extern int iommu_group_id(struct iommu_group *group);
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extern struct iommu_group *iommu_group_get_for_dev(struct device *dev);
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extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr,
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void *data);
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extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr,
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void *data);
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struct device *iommu_device_create(struct device *parent, void *drvdata,
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const struct attribute_group **groups,
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const char *fmt, ...);
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void iommu_device_destroy(struct device *dev);
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int iommu_device_link(struct device *dev, struct device *link);
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void iommu_device_unlink(struct device *dev, struct device *link);
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/* Window handling function prototypes */
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extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr,
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phys_addr_t offset, u64 size,
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int prot);
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extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr);
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/**
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* report_iommu_fault() - report about an IOMMU fault to the IOMMU framework
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* @domain: the iommu domain where the fault has happened
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* @dev: the device where the fault has happened
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* @iova: the faulting address
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* @flags: mmu fault flags (e.g. IOMMU_FAULT_READ/IOMMU_FAULT_WRITE/...)
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*
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* This function should be called by the low-level IOMMU implementations
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* whenever IOMMU faults happen, to allow high-level users, that are
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* interested in such events, to know about them.
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*
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* This event may be useful for several possible use cases:
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* - mere logging of the event
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* - dynamic TLB/PTE loading
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* - if restarting of the faulting device is required
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*
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* Returns 0 on success and an appropriate error code otherwise (if dynamic
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* PTE/TLB loading will one day be supported, implementations will be able
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* to tell whether it succeeded or not according to this return value).
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*
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* Specifically, -ENOSYS is returned if a fault handler isn't installed
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* (though fault handlers can also return -ENOSYS, in case they want to
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* elicit the default behavior of the IOMMU drivers).
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*/
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static inline int report_iommu_fault(struct iommu_domain *domain,
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struct device *dev, unsigned long iova, int flags)
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{
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int ret = -ENOSYS;
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/*
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* if upper layers showed interest and installed a fault handler,
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* invoke it.
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*/
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if (domain->handler)
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ret = domain->handler(domain, dev, iova, flags,
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domain->handler_token);
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trace_io_page_fault(dev, iova, flags);
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return ret;
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}
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#else /* CONFIG_IOMMU_API */
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struct iommu_ops {};
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struct iommu_group {};
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static inline bool iommu_present(struct bus_type *bus)
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{
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return false;
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}
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static inline struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
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{
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return NULL;
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}
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static inline struct iommu_group *iommu_group_get_by_id(int id)
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{
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return NULL;
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}
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static inline void iommu_domain_free(struct iommu_domain *domain)
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{
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}
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static inline int iommu_attach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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return -ENODEV;
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}
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static inline void iommu_detach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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}
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static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, int gfp_order, int prot)
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{
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return -ENODEV;
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}
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static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova,
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int gfp_order)
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{
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return -ENODEV;
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}
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static inline int iommu_domain_window_enable(struct iommu_domain *domain,
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u32 wnd_nr, phys_addr_t paddr,
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u64 size, int prot)
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{
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return -ENODEV;
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}
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static inline void iommu_domain_window_disable(struct iommu_domain *domain,
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u32 wnd_nr)
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{
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}
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static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain, dma_addr_t iova)
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{
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return 0;
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}
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static inline int iommu_domain_has_cap(struct iommu_domain *domain,
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unsigned long cap)
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{
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return 0;
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}
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static inline void iommu_set_fault_handler(struct iommu_domain *domain,
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iommu_fault_handler_t handler, void *token)
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{
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}
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static inline int iommu_attach_group(struct iommu_domain *domain,
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struct iommu_group *group)
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{
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return -ENODEV;
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}
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static inline void iommu_detach_group(struct iommu_domain *domain,
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struct iommu_group *group)
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{
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}
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static inline struct iommu_group *iommu_group_alloc(void)
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{
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return ERR_PTR(-ENODEV);
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}
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static inline void *iommu_group_get_iommudata(struct iommu_group *group)
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{
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return NULL;
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}
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static inline void iommu_group_set_iommudata(struct iommu_group *group,
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void *iommu_data,
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void (*release)(void *iommu_data))
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{
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}
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static inline int iommu_group_set_name(struct iommu_group *group,
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const char *name)
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{
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return -ENODEV;
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}
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static inline int iommu_group_add_device(struct iommu_group *group,
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struct device *dev)
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{
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return -ENODEV;
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}
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static inline void iommu_group_remove_device(struct device *dev)
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{
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}
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static inline int iommu_group_for_each_dev(struct iommu_group *group,
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void *data,
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int (*fn)(struct device *, void *))
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{
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return -ENODEV;
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}
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static inline struct iommu_group *iommu_group_get(struct device *dev)
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{
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return NULL;
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}
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static inline void iommu_group_put(struct iommu_group *group)
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{
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}
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static inline int iommu_group_register_notifier(struct iommu_group *group,
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struct notifier_block *nb)
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{
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return -ENODEV;
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}
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static inline int iommu_group_unregister_notifier(struct iommu_group *group,
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struct notifier_block *nb)
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{
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return 0;
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}
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static inline int iommu_group_id(struct iommu_group *group)
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{
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return -ENODEV;
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}
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static inline int iommu_domain_get_attr(struct iommu_domain *domain,
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enum iommu_attr attr, void *data)
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{
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return -EINVAL;
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}
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static inline int iommu_domain_set_attr(struct iommu_domain *domain,
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enum iommu_attr attr, void *data)
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{
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return -EINVAL;
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}
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static inline struct device *iommu_device_create(struct device *parent,
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void *drvdata,
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const struct attribute_group **groups,
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const char *fmt, ...)
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{
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return ERR_PTR(-ENODEV);
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}
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static inline void iommu_device_destroy(struct device *dev)
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{
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}
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static inline int iommu_device_link(struct device *dev, struct device *link)
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{
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return -EINVAL;
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}
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static inline void iommu_device_unlink(struct device *dev, struct device *link)
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{
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}
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#endif /* CONFIG_IOMMU_API */
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#endif /* __LINUX_IOMMU_H */
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