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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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abdf4799da
This change allows us to pass DMA_ATTR_SKIP_CPU_SYNC which allows us to avoid invoking cache line invalidation if the driver will just handle it via a sync_for_cpu or sync_for_device call. Link: http://lkml.kernel.org/r/20161110113518.76501.52225.stgit@ahduyck-blue-test.jf.intel.com Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Reviewed-by: Tobias Klauser <tklauser@distanz.ch> Cc: Ley Foon Tan <lftan@altera.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
208 lines
5.1 KiB
C
208 lines
5.1 KiB
C
/*
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* Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
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* Copyright (C) 2009 Wind River Systems Inc
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* Implemented by fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com
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*
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* Based on DMA code from MIPS.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/export.h>
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#include <linux/string.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <linux/cache.h>
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#include <asm/cacheflush.h>
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static inline void __dma_sync_for_device(void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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switch (direction) {
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case DMA_FROM_DEVICE:
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invalidate_dcache_range((unsigned long)vaddr,
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(unsigned long)(vaddr + size));
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break;
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case DMA_TO_DEVICE:
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/*
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* We just need to flush the caches here , but Nios2 flush
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* instruction will do both writeback and invalidate.
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*/
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case DMA_BIDIRECTIONAL: /* flush and invalidate */
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flush_dcache_range((unsigned long)vaddr,
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(unsigned long)(vaddr + size));
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break;
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default:
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BUG();
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}
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}
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static inline void __dma_sync_for_cpu(void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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switch (direction) {
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case DMA_BIDIRECTIONAL:
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case DMA_FROM_DEVICE:
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invalidate_dcache_range((unsigned long)vaddr,
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(unsigned long)(vaddr + size));
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break;
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case DMA_TO_DEVICE:
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break;
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default:
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BUG();
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}
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}
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static void *nios2_dma_alloc(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
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{
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void *ret;
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/* ignore region specifiers */
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gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
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/* optimized page clearing */
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gfp |= __GFP_ZERO;
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if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
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gfp |= GFP_DMA;
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ret = (void *) __get_free_pages(gfp, get_order(size));
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if (ret != NULL) {
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*dma_handle = virt_to_phys(ret);
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flush_dcache_range((unsigned long) ret,
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(unsigned long) ret + size);
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ret = UNCAC_ADDR(ret);
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}
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return ret;
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}
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static void nios2_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs)
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{
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unsigned long addr = (unsigned long) CAC_ADDR((unsigned long) vaddr);
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free_pages(addr, get_order(size));
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}
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static int nios2_dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction,
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unsigned long attrs)
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{
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int i;
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for_each_sg(sg, sg, nents, i) {
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void *addr = sg_virt(sg);
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if (!addr)
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continue;
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sg->dma_address = sg_phys(sg);
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if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
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continue;
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__dma_sync_for_device(addr, sg->length, direction);
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}
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return nents;
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}
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static dma_addr_t nios2_dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction direction,
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unsigned long attrs)
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{
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void *addr = page_address(page) + offset;
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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__dma_sync_for_device(addr, size, direction);
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return page_to_phys(page) + offset;
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}
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static void nios2_dma_unmap_page(struct device *dev, dma_addr_t dma_address,
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size_t size, enum dma_data_direction direction,
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unsigned long attrs)
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{
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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__dma_sync_for_cpu(phys_to_virt(dma_address), size, direction);
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}
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static void nios2_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nhwentries, enum dma_data_direction direction,
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unsigned long attrs)
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{
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void *addr;
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int i;
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if (direction == DMA_TO_DEVICE)
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return;
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if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
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return;
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for_each_sg(sg, sg, nhwentries, i) {
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addr = sg_virt(sg);
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if (addr)
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__dma_sync_for_cpu(addr, sg->length, direction);
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}
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}
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static void nios2_dma_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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__dma_sync_for_cpu(phys_to_virt(dma_handle), size, direction);
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}
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static void nios2_dma_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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__dma_sync_for_device(phys_to_virt(dma_handle), size, direction);
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}
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static void nios2_dma_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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int i;
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/* Make sure that gcc doesn't leave the empty loop body. */
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for_each_sg(sg, sg, nelems, i)
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__dma_sync_for_cpu(sg_virt(sg), sg->length, direction);
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}
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static void nios2_dma_sync_sg_for_device(struct device *dev,
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struct scatterlist *sg, int nelems,
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enum dma_data_direction direction)
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{
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int i;
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/* Make sure that gcc doesn't leave the empty loop body. */
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for_each_sg(sg, sg, nelems, i)
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__dma_sync_for_device(sg_virt(sg), sg->length, direction);
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}
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struct dma_map_ops nios2_dma_ops = {
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.alloc = nios2_dma_alloc,
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.free = nios2_dma_free,
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.map_page = nios2_dma_map_page,
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.unmap_page = nios2_dma_unmap_page,
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.map_sg = nios2_dma_map_sg,
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.unmap_sg = nios2_dma_unmap_sg,
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.sync_single_for_device = nios2_dma_sync_single_for_device,
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.sync_single_for_cpu = nios2_dma_sync_single_for_cpu,
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.sync_sg_for_cpu = nios2_dma_sync_sg_for_cpu,
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.sync_sg_for_device = nios2_dma_sync_sg_for_device,
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};
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EXPORT_SYMBOL(nios2_dma_ops);
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