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Add device tree bindings for Low Power Audio subsystem clock controller for Qualcomm Technology Inc's SDM845 SoCs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
74 lines
2.0 KiB
Plaintext
74 lines
2.0 KiB
Plaintext
Qualcomm Global Clock & Reset Controller Binding
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------------------------------------------------
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Required properties :
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- compatible : shall contain only one of the following:
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"qcom,gcc-apq8064"
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"qcom,gcc-apq8084"
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"qcom,gcc-ipq8064"
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"qcom,gcc-ipq4019"
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"qcom,gcc-ipq8074"
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"qcom,gcc-msm8660"
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"qcom,gcc-msm8916"
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"qcom,gcc-msm8960"
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"qcom,gcc-msm8974"
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"qcom,gcc-msm8974pro"
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"qcom,gcc-msm8974pro-ac"
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"qcom,gcc-msm8994"
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"qcom,gcc-msm8996"
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"qcom,gcc-msm8998"
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"qcom,gcc-mdm9615"
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"qcom,gcc-qcs404"
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"qcom,gcc-sdm630"
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"qcom,gcc-sdm660"
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"qcom,gcc-sdm845"
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- reg : shall contain base register location and length
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- #clock-cells : shall contain 1
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- #reset-cells : shall contain 1
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Optional properties :
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- #power-domain-cells : shall contain 1
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- Qualcomm TSENS (thermal sensor device) on some devices can
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be part of GCC and hence the TSENS properties can also be
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part of the GCC/clock-controller node.
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For more details on the TSENS properties please refer
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Documentation/devicetree/bindings/thermal/qcom-tsens.txt
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- protected-clocks : Protected clock specifier list as per common clock
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binding.
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Example:
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clock-controller@900000 {
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compatible = "qcom,gcc-msm8960";
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reg = <0x900000 0x4000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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Example of GCC with TSENS properties:
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clock-controller@900000 {
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compatible = "qcom,gcc-apq8064";
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reg = <0x00900000 0x4000>;
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nvmem-cells = <&tsens_calib>, <&tsens_backup>;
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nvmem-cell-names = "calib", "calib_backup";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#thermal-sensor-cells = <1>;
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};
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Example of GCC with protected-clocks properties:
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clock-controller@100000 {
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compatible = "qcom,gcc-sdm845";
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reg = <0x100000 0x1f0000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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protected-clocks = <GCC_QSPI_CORE_CLK>,
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<GCC_QSPI_CORE_CLK_SRC>,
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
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<GCC_LPASS_Q6_AXI_CLK>,
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<GCC_LPASS_SWAY_CLK>;
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};
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