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0c123a4fbb
Add clock binding doc update for imx6sll. Signed-off-by: Bai Ping <ping.bai@nxp.com> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
37 lines
1.2 KiB
Plaintext
37 lines
1.2 KiB
Plaintext
* Clock bindings for Freescale i.MX6 SLL
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Required properties:
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- compatible: Should be "fsl,imx6sll-ccm"
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- reg: Address and length of the register set
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- #clock-cells: Should be <1>
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- clocks: list of clock specifiers, must contain an entry for each required
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entry in clock-names
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- clock-names: should include entries "ckil", "osc", "ipp_di0" and "ipp_di1"
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The clock consumer should specify the desired clock by having the clock
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ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx6sll-clock.h
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for the full list of i.MX6 SLL clock IDs.
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Examples:
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#include <dt-bindings/clock/imx6sll-clock.h>
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clks: clock-controller@20c4000 {
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compatible = "fsl,imx6sll-ccm";
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reg = <0x020c4000 0x4000>;
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interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
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#clock-cells = <1>;
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clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
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clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
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};
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uart1: serial@2020000 {
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compatible = "fsl,imx6sl-uart", "fsl,imx6q-uart", "fsl,imx21-uart";
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reg = <0x02020000 0x4000>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX6SLL_CLK_UART1_IPG>,
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<&clks IMX6SLL_CLK_UART1_SERIAL>;
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clock-names = "ipg", "per";
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};
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