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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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564c9cc84e
Using .text.unlikely for refcount exceptions isn't safe because gcc may move entire functions into .text.unlikely (e.g. in6_dev_dev()), which would cause any uses of a protected refcount_t function to stay inline with the function, triggering the protection unconditionally: .section .text.unlikely,"ax",@progbits .type in6_dev_get, @function in6_dev_getx: .LFB4673: .loc 2 4128 0 .cfi_startproc ... lock; incl 480(%rbx) js 111f .pushsection .text.unlikely 111: lea 480(%rbx), %rcx 112: .byte 0x0f, 0xff .popsection 113: This creates a unique .text..refcount section and adds an additional test to the exception handler to WARN in the case of having none of OF, SF, nor ZF set so we can see things like this more easily in the future. The double dot for the section name keeps it out of the TEXT_MAIN macro namespace, to avoid collisions and so it can be put at the end with text.unlikely to keep the cold code together. See commit:cb87481ee8
("kbuild: linker script do not match C names unless LD_DEAD_CODE_DATA_ELIMINATION is configured") ... which matches C names: [a-zA-Z0-9_] but not ".". Reported-by: Mike Galbraith <efault@gmx.de> Signed-off-by: Kees Cook <keescook@chromium.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Elena <elena.reshetova@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arch <linux-arch@vger.kernel.org> Fixes:7a46ec0e2f
("locking/refcounts, x86/asm: Implement fast refcount overflow protection") Link: http://lkml.kernel.org/r/1504382986-49301-2-git-send-email-keescook@chromium.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
250 lines
7.4 KiB
C
250 lines
7.4 KiB
C
#include <linux/extable.h>
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#include <linux/uaccess.h>
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#include <linux/sched/debug.h>
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#include <asm/fpu/internal.h>
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#include <asm/traps.h>
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#include <asm/kdebug.h>
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typedef bool (*ex_handler_t)(const struct exception_table_entry *,
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struct pt_regs *, int);
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static inline unsigned long
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ex_fixup_addr(const struct exception_table_entry *x)
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{
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return (unsigned long)&x->fixup + x->fixup;
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}
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static inline ex_handler_t
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ex_fixup_handler(const struct exception_table_entry *x)
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{
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return (ex_handler_t)((unsigned long)&x->handler + x->handler);
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}
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bool ex_handler_default(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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regs->ip = ex_fixup_addr(fixup);
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return true;
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}
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EXPORT_SYMBOL(ex_handler_default);
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bool ex_handler_fault(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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regs->ip = ex_fixup_addr(fixup);
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regs->ax = trapnr;
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return true;
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}
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EXPORT_SYMBOL_GPL(ex_handler_fault);
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/*
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* Handler for UD0 exception following a failed test against the
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* result of a refcount inc/dec/add/sub.
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*/
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bool ex_handler_refcount(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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/* First unconditionally saturate the refcount. */
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*(int *)regs->cx = INT_MIN / 2;
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/*
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* Strictly speaking, this reports the fixup destination, not
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* the fault location, and not the actually overflowing
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* instruction, which is the instruction before the "js", but
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* since that instruction could be a variety of lengths, just
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* report the location after the overflow, which should be close
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* enough for finding the overflow, as it's at least back in
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* the function, having returned from .text.unlikely.
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*/
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regs->ip = ex_fixup_addr(fixup);
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/*
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* This function has been called because either a negative refcount
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* value was seen by any of the refcount functions, or a zero
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* refcount value was seen by refcount_dec().
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*
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* If we crossed from INT_MAX to INT_MIN, OF (Overflow Flag: result
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* wrapped around) will be set. Additionally, seeing the refcount
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* reach 0 will set ZF (Zero Flag: result was zero). In each of
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* these cases we want a report, since it's a boundary condition.
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* The SF case is not reported since it indicates post-boundary
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* manipulations below zero or above INT_MAX. And if none of the
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* flags are set, something has gone very wrong, so report it.
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*/
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if (regs->flags & (X86_EFLAGS_OF | X86_EFLAGS_ZF)) {
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bool zero = regs->flags & X86_EFLAGS_ZF;
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refcount_error_report(regs, zero ? "hit zero" : "overflow");
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} else if ((regs->flags & X86_EFLAGS_SF) == 0) {
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/* Report if none of OF, ZF, nor SF are set. */
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refcount_error_report(regs, "unexpected saturation");
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}
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return true;
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}
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EXPORT_SYMBOL_GPL(ex_handler_refcount);
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/*
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* Handler for when we fail to restore a task's FPU state. We should never get
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* here because the FPU state of a task using the FPU (task->thread.fpu.state)
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* should always be valid. However, past bugs have allowed userspace to set
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* reserved bits in the XSAVE area using PTRACE_SETREGSET or sys_rt_sigreturn().
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* These caused XRSTOR to fail when switching to the task, leaking the FPU
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* registers of the task previously executing on the CPU. Mitigate this class
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* of vulnerability by restoring from the initial state (essentially, zeroing
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* out all the FPU registers) if we can't restore from the task's FPU state.
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*/
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bool ex_handler_fprestore(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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regs->ip = ex_fixup_addr(fixup);
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WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.",
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(void *)instruction_pointer(regs));
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__copy_kernel_to_fpregs(&init_fpstate, -1);
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return true;
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}
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EXPORT_SYMBOL_GPL(ex_handler_fprestore);
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bool ex_handler_ext(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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/* Special hack for uaccess_err */
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current->thread.uaccess_err = 1;
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regs->ip = ex_fixup_addr(fixup);
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return true;
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}
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EXPORT_SYMBOL(ex_handler_ext);
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bool ex_handler_rdmsr_unsafe(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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if (pr_warn_once("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pF)\n",
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(unsigned int)regs->cx, regs->ip, (void *)regs->ip))
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show_stack_regs(regs);
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/* Pretend that the read succeeded and returned 0. */
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regs->ip = ex_fixup_addr(fixup);
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regs->ax = 0;
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regs->dx = 0;
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return true;
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}
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EXPORT_SYMBOL(ex_handler_rdmsr_unsafe);
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bool ex_handler_wrmsr_unsafe(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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if (pr_warn_once("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pF)\n",
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(unsigned int)regs->cx, (unsigned int)regs->dx,
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(unsigned int)regs->ax, regs->ip, (void *)regs->ip))
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show_stack_regs(regs);
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/* Pretend that the write succeeded. */
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regs->ip = ex_fixup_addr(fixup);
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return true;
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}
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EXPORT_SYMBOL(ex_handler_wrmsr_unsafe);
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bool ex_handler_clear_fs(const struct exception_table_entry *fixup,
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struct pt_regs *regs, int trapnr)
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{
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if (static_cpu_has(X86_BUG_NULL_SEG))
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asm volatile ("mov %0, %%fs" : : "rm" (__USER_DS));
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asm volatile ("mov %0, %%fs" : : "rm" (0));
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return ex_handler_default(fixup, regs, trapnr);
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}
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EXPORT_SYMBOL(ex_handler_clear_fs);
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bool ex_has_fault_handler(unsigned long ip)
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{
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const struct exception_table_entry *e;
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ex_handler_t handler;
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e = search_exception_tables(ip);
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if (!e)
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return false;
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handler = ex_fixup_handler(e);
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return handler == ex_handler_fault;
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}
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int fixup_exception(struct pt_regs *regs, int trapnr)
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{
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const struct exception_table_entry *e;
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ex_handler_t handler;
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#ifdef CONFIG_PNPBIOS
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if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) {
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extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp;
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extern u32 pnp_bios_is_utter_crap;
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pnp_bios_is_utter_crap = 1;
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printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n");
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__asm__ volatile(
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"movl %0, %%esp\n\t"
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"jmp *%1\n\t"
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: : "g" (pnp_bios_fault_esp), "g" (pnp_bios_fault_eip));
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panic("do_trap: can't hit this");
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}
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#endif
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e = search_exception_tables(regs->ip);
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if (!e)
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return 0;
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handler = ex_fixup_handler(e);
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return handler(e, regs, trapnr);
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}
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extern unsigned int early_recursion_flag;
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/* Restricted version used during very early boot */
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void __init early_fixup_exception(struct pt_regs *regs, int trapnr)
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{
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/* Ignore early NMIs. */
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if (trapnr == X86_TRAP_NMI)
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return;
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if (early_recursion_flag > 2)
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goto halt_loop;
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/*
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* Old CPUs leave the high bits of CS on the stack
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* undefined. I'm not sure which CPUs do this, but at least
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* the 486 DX works this way.
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*/
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if (regs->cs != __KERNEL_CS)
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goto fail;
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/*
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* The full exception fixup machinery is available as soon as
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* the early IDT is loaded. This means that it is the
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* responsibility of extable users to either function correctly
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* when handlers are invoked early or to simply avoid causing
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* exceptions before they're ready to handle them.
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*
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* This is better than filtering which handlers can be used,
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* because refusing to call a handler here is guaranteed to
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* result in a hard-to-debug panic.
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*
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* Keep in mind that not all vectors actually get here. Early
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* fage faults, for example, are special.
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*/
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if (fixup_exception(regs, trapnr))
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return;
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if (fixup_bug(regs, trapnr))
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return;
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fail:
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early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n",
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(unsigned)trapnr, (unsigned long)regs->cs, regs->ip,
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regs->orig_ax, read_cr2());
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show_regs(regs);
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halt_loop:
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while (true)
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halt();
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}
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