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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0db2e5d18f
Taking inspiration from the existing arch/arm code, break out some generic functions to interface the DMA-API to the IOMMU-API. This will do the bulk of the heavy lifting for IOMMU-backed dma-mapping. Since associating an IOVA allocator with an IOMMU domain is a fairly common need, rather than introduce yet another private structure just to do this for ourselves, extend the top-level struct iommu_domain with the notion. A simple opaque cookie allows reuse by other IOMMU API users with their various different incompatible allocator types. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
86 lines
2.7 KiB
C
86 lines
2.7 KiB
C
/*
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* Copyright (C) 2014-2015 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __DMA_IOMMU_H
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#define __DMA_IOMMU_H
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#ifdef __KERNEL__
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#include <asm/errno.h>
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#ifdef CONFIG_IOMMU_DMA
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#include <linux/iommu.h>
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int iommu_dma_init(void);
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/* Domain management interface for IOMMU drivers */
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int iommu_get_dma_cookie(struct iommu_domain *domain);
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void iommu_put_dma_cookie(struct iommu_domain *domain);
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/* Setup call for arch DMA mapping code */
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int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, u64 size);
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/* General helpers for DMA-API <-> IOMMU-API interaction */
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int dma_direction_to_prot(enum dma_data_direction dir, bool coherent);
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/*
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* These implement the bulk of the relevant DMA mapping callbacks, but require
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* the arch code to take care of attributes and cache maintenance
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*/
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struct page **iommu_dma_alloc(struct device *dev, size_t size,
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gfp_t gfp, int prot, dma_addr_t *handle,
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void (*flush_page)(struct device *, const void *, phys_addr_t));
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void iommu_dma_free(struct device *dev, struct page **pages, size_t size,
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dma_addr_t *handle);
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int iommu_dma_mmap(struct page **pages, size_t size, struct vm_area_struct *vma);
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dma_addr_t iommu_dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, int prot);
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int iommu_dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, int prot);
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/*
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* Arch code with no special attribute handling may use these
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* directly as DMA mapping callbacks for simplicity
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*/
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void iommu_dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
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enum dma_data_direction dir, struct dma_attrs *attrs);
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void iommu_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir, struct dma_attrs *attrs);
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int iommu_dma_supported(struct device *dev, u64 mask);
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int iommu_dma_mapping_error(struct device *dev, dma_addr_t dma_addr);
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#else
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struct iommu_domain;
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static inline int iommu_dma_init(void)
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{
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return 0;
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}
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static inline int iommu_get_dma_cookie(struct iommu_domain *domain)
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{
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return -ENODEV;
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}
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static inline void iommu_put_dma_cookie(struct iommu_domain *domain)
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{
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}
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#endif /* CONFIG_IOMMU_DMA */
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#endif /* __KERNEL__ */
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#endif /* __DMA_IOMMU_H */
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