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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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81a409bfd5
The sensor needs the MCLK clock running when it's being probed. On platforms where the sensor is instantiated from a DT (MMP2) it is going to happen asynchronously. Therefore, the current modus operandi, where the bridge driver fiddles with the sensor power and clock itself is not going to fly. As the comments wisely note, this doesn't even belong there. Luckily, the ov7670 driver is already able to control its power and reset lines, we can just drop the MMP platform glue altogether. It also requests the clock via the standard clock subsystem. Good -- let's set up a clock instance so that the sensor can ask us to enable the clock. Note that this is pretty dumb at the moment: the clock is hardwired to a particular frequency and parent. It was always the case. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
26 lines
624 B
C
26 lines
624 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Information for the Marvell Armada MMP camera
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*/
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#include <media/v4l2-mediabus.h>
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enum dphy3_algo {
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DPHY3_ALGO_DEFAULT = 0,
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DPHY3_ALGO_PXA910,
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DPHY3_ALGO_PXA2128
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};
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struct mmp_camera_platform_data {
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enum v4l2_mbus_type bus_type;
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int mclk_src; /* which clock source the MCLK derives from */
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int mclk_div; /* Clock Divider Value for MCLK */
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/*
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* MIPI support
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*/
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int dphy[3]; /* DPHY: CSI2_DPHY3, CSI2_DPHY5, CSI2_DPHY6 */
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enum dphy3_algo dphy3_algo; /* algos for calculate CSI2_DPHY3 */
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int lane; /* ccic used lane number; 0 means DVP mode */
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int lane_clk;
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};
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