mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 08:04:06 +07:00
2c907f05dc
It was though all ES revisions of H3 and M3-W SoCs required the TMIO_MMC_HAVE_4TAP_HS400 flag. Recent datasheet updates tells us this is not true, only early ES revisions of the SoC do. Since quirk matching based on ES revisions is now used to handle the flag it's possible to align all Gen3 compatibility properties. This will allow later ES revisions of H3 and M3-W to use the correct 8-tap HS400 mode. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
514 lines
14 KiB
C
514 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* DMA support use of SYS DMAC with SDHI SD/SDIO controller
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*
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* Copyright (C) 2016-17 Renesas Electronics Corporation
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* Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
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* Copyright (C) 2017 Horms Solutions, Simon Horman
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* Copyright (C) 2010-2011 Guennadi Liakhovetski
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*/
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmaengine.h>
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#include <linux/mfd/tmio.h>
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#include <linux/mmc/host.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/pagemap.h>
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#include <linux/scatterlist.h>
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#include <linux/sys_soc.h>
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#include "renesas_sdhi.h"
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#include "tmio_mmc.h"
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#define TMIO_MMC_MIN_DMA_LEN 8
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static const struct renesas_sdhi_of_data of_default_cfg = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
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};
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static const struct renesas_sdhi_of_data of_rz_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT |
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TMIO_MMC_HAVE_CBSY,
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.tmio_ocr_mask = MMC_VDD_32_33,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
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};
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static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
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.capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
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};
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/* Definitions for sampling clocks */
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static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = {
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{
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.clk_rate = 156000000,
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.tap = 0x00000703,
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},
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{
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.clk_rate = 0,
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.tap = 0x00000300,
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},
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};
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static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
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TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_CMD23,
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.capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
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.dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
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.dma_rx_offset = 0x2000,
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.scc_offset = 0x0300,
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.taps = rcar_gen2_scc_taps,
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.taps_num = ARRAY_SIZE(rcar_gen2_scc_taps),
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};
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/* Definitions for sampling clocks */
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static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
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{
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.clk_rate = 0,
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.tap = 0x00000300,
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},
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};
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static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
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TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_CMD23,
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.capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
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.bus_shift = 2,
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.scc_offset = 0x1000,
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.taps = rcar_gen3_scc_taps,
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.taps_num = ARRAY_SIZE(rcar_gen3_scc_taps),
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};
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static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
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{ .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
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{ .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
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{ .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
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{ .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
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{ .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
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{ .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
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{ .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
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{ .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
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{ .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, },
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{ .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, },
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{ .compatible = "renesas,rcar-gen3-sdhi", .data = &of_rcar_gen3_compatible, },
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{ .compatible = "renesas,sdhi-shmobile" },
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{},
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};
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MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match);
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static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host,
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bool enable)
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{
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struct renesas_sdhi *priv = host_to_priv(host);
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if (!host->chan_tx || !host->chan_rx)
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return;
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if (priv->dma_priv.enable)
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priv->dma_priv.enable(host, enable);
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}
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static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
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{
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renesas_sdhi_sys_dmac_enable_dma(host, false);
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if (host->chan_rx)
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dmaengine_terminate_all(host->chan_rx);
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if (host->chan_tx)
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dmaengine_terminate_all(host->chan_tx);
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renesas_sdhi_sys_dmac_enable_dma(host, true);
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}
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static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host)
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{
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struct renesas_sdhi *priv = host_to_priv(host);
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complete(&priv->dma_priv.dma_dataend);
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}
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static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
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{
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struct tmio_mmc_host *host = arg;
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struct renesas_sdhi *priv = host_to_priv(host);
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spin_lock_irq(&host->lock);
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if (!host->data)
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goto out;
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if (host->data->flags & MMC_DATA_READ)
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dma_unmap_sg(host->chan_rx->device->dev,
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host->sg_ptr, host->sg_len,
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DMA_FROM_DEVICE);
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else
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dma_unmap_sg(host->chan_tx->device->dev,
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host->sg_ptr, host->sg_len,
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DMA_TO_DEVICE);
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spin_unlock_irq(&host->lock);
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wait_for_completion(&priv->dma_priv.dma_dataend);
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spin_lock_irq(&host->lock);
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tmio_mmc_do_data_irq(host);
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out:
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spin_unlock_irq(&host->lock);
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}
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static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host)
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{
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struct renesas_sdhi *priv = host_to_priv(host);
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struct scatterlist *sg = host->sg_ptr, *sg_tmp;
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struct dma_async_tx_descriptor *desc = NULL;
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struct dma_chan *chan = host->chan_rx;
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dma_cookie_t cookie;
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int ret, i;
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bool aligned = true, multiple = true;
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unsigned int align = (1 << host->pdata->alignment_shift) - 1;
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for_each_sg(sg, sg_tmp, host->sg_len, i) {
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if (sg_tmp->offset & align)
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aligned = false;
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if (sg_tmp->length & align) {
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multiple = false;
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break;
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}
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}
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if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
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(align & PAGE_MASK))) || !multiple) {
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ret = -EINVAL;
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goto pio;
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}
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if (sg->length < TMIO_MMC_MIN_DMA_LEN)
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return;
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/* The only sg element can be unaligned, use our bounce buffer then */
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if (!aligned) {
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sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
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host->sg_ptr = &host->bounce_sg;
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sg = host->sg_ptr;
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}
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ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE);
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if (ret > 0)
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desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM,
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DMA_CTRL_ACK);
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if (desc) {
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reinit_completion(&priv->dma_priv.dma_dataend);
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desc->callback = renesas_sdhi_sys_dmac_dma_callback;
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desc->callback_param = host;
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cookie = dmaengine_submit(desc);
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if (cookie < 0) {
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desc = NULL;
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ret = cookie;
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}
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host->dma_on = true;
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}
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pio:
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if (!desc) {
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/* DMA failed, fall back to PIO */
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renesas_sdhi_sys_dmac_enable_dma(host, false);
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if (ret >= 0)
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ret = -EIO;
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host->chan_rx = NULL;
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dma_release_channel(chan);
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/* Free the Tx channel too */
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chan = host->chan_tx;
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if (chan) {
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host->chan_tx = NULL;
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dma_release_channel(chan);
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}
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dev_warn(&host->pdev->dev,
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"DMA failed: %d, falling back to PIO\n", ret);
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}
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}
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static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host)
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{
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struct renesas_sdhi *priv = host_to_priv(host);
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struct scatterlist *sg = host->sg_ptr, *sg_tmp;
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struct dma_async_tx_descriptor *desc = NULL;
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struct dma_chan *chan = host->chan_tx;
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dma_cookie_t cookie;
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int ret, i;
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bool aligned = true, multiple = true;
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unsigned int align = (1 << host->pdata->alignment_shift) - 1;
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for_each_sg(sg, sg_tmp, host->sg_len, i) {
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if (sg_tmp->offset & align)
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aligned = false;
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if (sg_tmp->length & align) {
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multiple = false;
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break;
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}
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}
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if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
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(align & PAGE_MASK))) || !multiple) {
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ret = -EINVAL;
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goto pio;
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}
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if (sg->length < TMIO_MMC_MIN_DMA_LEN)
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return;
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/* The only sg element can be unaligned, use our bounce buffer then */
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if (!aligned) {
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unsigned long flags;
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void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags);
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sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
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memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length);
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tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr);
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host->sg_ptr = &host->bounce_sg;
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sg = host->sg_ptr;
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}
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ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE);
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if (ret > 0)
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desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV,
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DMA_CTRL_ACK);
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if (desc) {
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reinit_completion(&priv->dma_priv.dma_dataend);
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desc->callback = renesas_sdhi_sys_dmac_dma_callback;
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desc->callback_param = host;
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cookie = dmaengine_submit(desc);
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if (cookie < 0) {
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desc = NULL;
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ret = cookie;
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}
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host->dma_on = true;
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}
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pio:
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if (!desc) {
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/* DMA failed, fall back to PIO */
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renesas_sdhi_sys_dmac_enable_dma(host, false);
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if (ret >= 0)
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ret = -EIO;
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host->chan_tx = NULL;
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dma_release_channel(chan);
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/* Free the Rx channel too */
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chan = host->chan_rx;
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if (chan) {
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host->chan_rx = NULL;
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dma_release_channel(chan);
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}
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dev_warn(&host->pdev->dev,
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"DMA failed: %d, falling back to PIO\n", ret);
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}
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}
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static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host,
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struct mmc_data *data)
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{
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if (data->flags & MMC_DATA_READ) {
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if (host->chan_rx)
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renesas_sdhi_sys_dmac_start_dma_rx(host);
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} else {
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if (host->chan_tx)
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renesas_sdhi_sys_dmac_start_dma_tx(host);
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}
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}
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static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv)
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{
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struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
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struct dma_chan *chan = NULL;
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spin_lock_irq(&host->lock);
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if (host->data) {
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if (host->data->flags & MMC_DATA_READ)
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chan = host->chan_rx;
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else
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chan = host->chan_tx;
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}
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spin_unlock_irq(&host->lock);
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tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND);
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if (chan)
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dma_async_issue_pending(chan);
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}
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static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
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struct tmio_mmc_data *pdata)
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{
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struct renesas_sdhi *priv = host_to_priv(host);
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/* We can only either use DMA for both Tx and Rx or not use it at all */
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if (!host->pdev->dev.of_node &&
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(!pdata->chan_priv_tx || !pdata->chan_priv_rx))
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return;
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if (!host->chan_tx && !host->chan_rx) {
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struct resource *res = platform_get_resource(host->pdev,
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IORESOURCE_MEM, 0);
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struct dma_slave_config cfg = {};
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dma_cap_mask_t mask;
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int ret;
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if (!res)
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return;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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host->chan_tx = dma_request_slave_channel_compat(mask,
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priv->dma_priv.filter, pdata->chan_priv_tx,
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&host->pdev->dev, "tx");
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dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
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host->chan_tx);
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if (!host->chan_tx)
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return;
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cfg.direction = DMA_MEM_TO_DEV;
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cfg.dst_addr = res->start +
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(CTL_SD_DATA_PORT << host->bus_shift);
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cfg.dst_addr_width = priv->dma_priv.dma_buswidth;
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if (!cfg.dst_addr_width)
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cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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cfg.src_addr = 0;
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ret = dmaengine_slave_config(host->chan_tx, &cfg);
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if (ret < 0)
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goto ecfgtx;
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host->chan_rx = dma_request_slave_channel_compat(mask,
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priv->dma_priv.filter, pdata->chan_priv_rx,
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&host->pdev->dev, "rx");
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dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
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host->chan_rx);
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if (!host->chan_rx)
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goto ereqrx;
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cfg.direction = DMA_DEV_TO_MEM;
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cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset;
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cfg.src_addr_width = priv->dma_priv.dma_buswidth;
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if (!cfg.src_addr_width)
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cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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cfg.dst_addr = 0;
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ret = dmaengine_slave_config(host->chan_rx, &cfg);
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if (ret < 0)
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goto ecfgrx;
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host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA);
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if (!host->bounce_buf)
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goto ebouncebuf;
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init_completion(&priv->dma_priv.dma_dataend);
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tasklet_init(&host->dma_issue,
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renesas_sdhi_sys_dmac_issue_tasklet_fn,
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(unsigned long)host);
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}
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renesas_sdhi_sys_dmac_enable_dma(host, true);
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return;
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ebouncebuf:
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ecfgrx:
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dma_release_channel(host->chan_rx);
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host->chan_rx = NULL;
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ereqrx:
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ecfgtx:
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dma_release_channel(host->chan_tx);
|
|
host->chan_tx = NULL;
|
|
}
|
|
|
|
static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host)
|
|
{
|
|
if (host->chan_tx) {
|
|
struct dma_chan *chan = host->chan_tx;
|
|
|
|
host->chan_tx = NULL;
|
|
dma_release_channel(chan);
|
|
}
|
|
if (host->chan_rx) {
|
|
struct dma_chan *chan = host->chan_rx;
|
|
|
|
host->chan_rx = NULL;
|
|
dma_release_channel(chan);
|
|
}
|
|
if (host->bounce_buf) {
|
|
free_pages((unsigned long)host->bounce_buf, 0);
|
|
host->bounce_buf = NULL;
|
|
}
|
|
}
|
|
|
|
static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = {
|
|
.start = renesas_sdhi_sys_dmac_start_dma,
|
|
.enable = renesas_sdhi_sys_dmac_enable_dma,
|
|
.request = renesas_sdhi_sys_dmac_request_dma,
|
|
.release = renesas_sdhi_sys_dmac_release_dma,
|
|
.abort = renesas_sdhi_sys_dmac_abort_dma,
|
|
.dataend = renesas_sdhi_sys_dmac_dataend_dma,
|
|
};
|
|
|
|
/*
|
|
* Whitelist of specific R-Car Gen3 SoC ES versions to use this DMAC
|
|
* implementation. Currently empty as all supported ES versions use
|
|
* the internal DMAC.
|
|
*/
|
|
static const struct soc_device_attribute gen3_soc_whitelist[] = {
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev)
|
|
{
|
|
if (of_device_get_match_data(&pdev->dev) == &of_rcar_gen3_compatible &&
|
|
!soc_device_match(gen3_soc_whitelist))
|
|
return -ENODEV;
|
|
|
|
return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops);
|
|
}
|
|
|
|
static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = {
|
|
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
|
|
pm_runtime_force_resume)
|
|
SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
|
|
tmio_mmc_host_runtime_resume,
|
|
NULL)
|
|
};
|
|
|
|
static struct platform_driver renesas_sys_dmac_sdhi_driver = {
|
|
.driver = {
|
|
.name = "sh_mobile_sdhi",
|
|
.pm = &renesas_sdhi_sys_dmac_dev_pm_ops,
|
|
.of_match_table = renesas_sdhi_sys_dmac_of_match,
|
|
},
|
|
.probe = renesas_sdhi_sys_dmac_probe,
|
|
.remove = renesas_sdhi_remove,
|
|
};
|
|
|
|
module_platform_driver(renesas_sys_dmac_sdhi_driver);
|
|
|
|
MODULE_DESCRIPTION("Renesas SDHI driver");
|
|
MODULE_AUTHOR("Magnus Damm");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_ALIAS("platform:sh_mobile_sdhi");
|