mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 21:35:20 +07:00
9f74d77018
This patch is to add four options to synthesize events which are described as below: 'f': synthesize first level cache events 'm': synthesize last level cache events 't': synthesize TLB events 'a': synthesize remote access events This four options will be used by ARM SPE as their first consumer. Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com> Tested-by: James Clark <james.clark@arm.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: Al Grant <al.grant@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Ian Rogers <irogers@google.com> Cc: Jin Yao <yao.jin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: http://lore.kernel.org/lkml/20200530122442.490-3-leo.yan@linaro.org Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
50 lines
1.8 KiB
Plaintext
50 lines
1.8 KiB
Plaintext
i synthesize instructions events
|
|
b synthesize branches events (branch misses for Arm SPE)
|
|
c synthesize branches events (calls only)
|
|
r synthesize branches events (returns only)
|
|
x synthesize transactions events
|
|
w synthesize ptwrite events
|
|
p synthesize power events
|
|
o synthesize other events recorded due to the use
|
|
of aux-output (refer to perf record)
|
|
e synthesize error events
|
|
d create a debug log
|
|
f synthesize first level cache events
|
|
m synthesize last level cache events
|
|
t synthesize TLB events
|
|
a synthesize remote access events
|
|
g synthesize a call chain (use with i or x)
|
|
G synthesize a call chain on existing event records
|
|
l synthesize last branch entries (use with i or x)
|
|
L synthesize last branch entries on existing event records
|
|
s skip initial number of events
|
|
|
|
The default is all events i.e. the same as --itrace=ibxwpe,
|
|
except for perf script where it is --itrace=ce
|
|
|
|
In addition, the period (default 100000, except for perf script where it is 1)
|
|
for instructions events can be specified in units of:
|
|
|
|
i instructions
|
|
t ticks
|
|
ms milliseconds
|
|
us microseconds
|
|
ns nanoseconds (default)
|
|
|
|
Also the call chain size (default 16, max. 1024) for instructions or
|
|
transactions events can be specified.
|
|
|
|
Also the number of last branch entries (default 64, max. 1024) for
|
|
instructions or transactions events can be specified.
|
|
|
|
Similar to options g and l, size may also be specified for options G and L.
|
|
On x86, note that G and L work poorly when data has been recorded with
|
|
large PEBS. Refer linkperf:perf-intel-pt[1] man page for details.
|
|
|
|
It is also possible to skip events generated (instructions, branches, transactions,
|
|
ptwrite, power) at the beginning. This is useful to ignore initialization code.
|
|
|
|
--itrace=i0nss1000000
|
|
|
|
skips the first million instructions.
|