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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b295477e00
On Armada 7K/8k: - Improve network support at SoC and board level - Enable watchdog - Add UART muxing - On 7040 DB: add CD SDIO and NAND support - On 8040 DB: add PCIE more ports and SPI1 On Armada 37xx: - Fix UART register size - Add vmmc regulator for SD on 3720 DB -----BEGIN PGP SIGNATURE----- iIEEABECAEEWIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCWeoPnCMcZ3JlZ29yeS5j bGVtZW50QGZyZWUtZWxlY3Ryb25zLmNvbQAKCRALBhiOFHI71eWeAJ4yqhFToGh9 bLvyANmN33Lp0kYfEwCeKTJv715mvxAfJMYUMX7CUmgEAOs= =9sls -----END PGP SIGNATURE----- Merge tag 'mvebu-dt64-4.15-1' of git://git.infradead.org/linux-mvebu into next/dt Pull "mvebu dt64 for 4.15 (part 1)" from Gregory CLEMENT: On Armada 7K/8k: - Improve network support at SoC and board level - Enable watchdog - Add UART muxing - On 7040 DB: add CD SDIO and NAND support - On 8040 DB: add PCIE more ports and SPI1 On Armada 37xx: - Fix UART register size - Add vmmc regulator for SD on 3720 DB * tag 'mvebu-dt64-4.15-1' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: 7040-db: Add the carrier detect pin for SD card on CP arm64: dts: marvell: 7040-db: Document the gpio expander arm64: dts: marvell: enable additional PCIe ports on Armada 8040 DB arm64: dts: marvell: add NAND support on the 7040-DB board arm64: dts: marvell: Enable Armada-8040-DB CPS SPI1 arm64: dts: marvell: 8040-db: enable the SFP ports arm64: dts: marvell: 7040-db: enable the SFP port arm64: dts: marvell: 7040-db: add comphy reference to Ethernet port arm64: dts: marvell: mcbin: add comphy references to Ethernet ports arm64: dts: marvell: 37xx: remove empty line arm64: dts: marvell: cp110: add PPv2 port interrupts arm64: dts: marvell: add comphy nodes on cp110 master and slave arm64: dts: marvell: extend the cp110 syscon register area length arm64: dts: marvell: enable AP806 watchdog arm64: dts: marvell: Fix A37xx UART0 register size arm64: dts: marvell: armada-3720-db: Add vmmc regulator for SD slot arm64: dts: marvell: add UART muxing on Armada 7K/8K
291 lines
7.7 KiB
Plaintext
291 lines
7.7 KiB
Plaintext
/*
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* Copyright (C) 2016 Marvell Technology Group Ltd.
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPLv2 or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/*
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* Device Tree file for Marvell Armada AP806.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/dts-v1/;
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/ {
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model = "Marvell Armada AP806";
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compatible = "marvell,armada-ap806";
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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gpio0 = &ap_gpio;
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};
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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ap806 {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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interrupt-parent = <&gic>;
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ranges;
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config-space@f0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0x0 0x0 0xf0000000 0x1000000>;
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gic: interrupt-controller@210000 {
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compatible = "arm,gic-400";
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#interrupt-cells = <3>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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interrupt-controller;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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reg = <0x210000 0x10000>,
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<0x220000 0x20000>,
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<0x240000 0x20000>,
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<0x260000 0x20000>;
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gic_v2m0: v2m@280000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x280000 0x1000>;
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arm,msi-base-spi = <160>;
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arm,msi-num-spis = <32>;
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};
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gic_v2m1: v2m@290000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x290000 0x1000>;
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arm,msi-base-spi = <192>;
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arm,msi-num-spis = <32>;
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};
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gic_v2m2: v2m@2a0000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x2a0000 0x1000>;
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arm,msi-base-spi = <224>;
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arm,msi-num-spis = <32>;
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};
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gic_v2m3: v2m@2b0000 {
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compatible = "arm,gic-v2m-frame";
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msi-controller;
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reg = <0x2b0000 0x1000>;
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arm,msi-base-spi = <256>;
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arm,msi-num-spis = <32>;
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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pmu {
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compatible = "arm,cortex-a72-pmu";
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interrupt-parent = <&pic>;
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interrupts = <17>;
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};
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odmi: odmi@300000 {
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compatible = "marvell,odmi-controller";
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interrupt-controller;
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msi-controller;
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marvell,odmi-frames = <4>;
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reg = <0x300000 0x4000>,
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<0x304000 0x4000>,
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<0x308000 0x4000>,
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<0x30C000 0x4000>;
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marvell,spi-base = <128>, <136>, <144>, <152>;
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};
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gicp: gicp@3f0040 {
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compatible = "marvell,ap806-gicp";
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reg = <0x3f0040 0x10>;
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marvell,spi-ranges = <64 64>, <288 64>;
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msi-controller;
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};
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pic: interrupt-controller@3f0100 {
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compatible = "marvell,armada-8k-pic";
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reg = <0x3f0100 0x10>;
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#interrupt-cells = <1>;
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interrupt-controller;
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interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
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};
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xor@400000 {
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compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
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reg = <0x400000 0x1000>,
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<0x410000 0x1000>;
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msi-parent = <&gic_v2m0>;
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clocks = <&ap_clk 3>;
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dma-coherent;
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};
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xor@420000 {
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compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
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reg = <0x420000 0x1000>,
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<0x430000 0x1000>;
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msi-parent = <&gic_v2m0>;
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clocks = <&ap_clk 3>;
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dma-coherent;
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};
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xor@440000 {
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compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
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reg = <0x440000 0x1000>,
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<0x450000 0x1000>;
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msi-parent = <&gic_v2m0>;
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clocks = <&ap_clk 3>;
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dma-coherent;
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};
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xor@460000 {
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compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
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reg = <0x460000 0x1000>,
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<0x470000 0x1000>;
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msi-parent = <&gic_v2m0>;
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clocks = <&ap_clk 3>;
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dma-coherent;
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};
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spi0: spi@510600 {
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compatible = "marvell,armada-380-spi";
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reg = <0x510600 0x50>;
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ap_clk 3>;
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status = "disabled";
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};
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i2c0: i2c@511000 {
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compatible = "marvell,mv78230-i2c";
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reg = <0x511000 0x20>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
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timeout-ms = <1000>;
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clocks = <&ap_clk 3>;
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status = "disabled";
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};
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uart0: serial@512000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x512000 0x100>;
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reg-shift = <2>;
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interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
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reg-io-width = <1>;
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clocks = <&ap_clk 3>;
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status = "disabled";
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};
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uart1: serial@512100 {
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compatible = "snps,dw-apb-uart";
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reg = <0x512100 0x100>;
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reg-shift = <2>;
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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reg-io-width = <1>;
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clocks = <&ap_clk 3>;
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status = "disabled";
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};
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watchdog: watchdog@600000 {
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compatible = "arm,sbsa-gwdt";
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reg = <0x610000 0x1000>, <0x600000 0x1000>;
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interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
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};
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ap_sdhci0: sdhci@6e0000 {
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compatible = "marvell,armada-ap806-sdhci";
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reg = <0x6e0000 0x300>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "core";
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clocks = <&ap_clk 4>;
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dma-coherent;
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marvell,xenon-phy-slow-mode;
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status = "disabled";
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};
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ap_syscon: system-controller@6f4000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x6f4000 0x2000>;
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ap_clk: clock {
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compatible = "marvell,ap806-clock";
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#clock-cells = <1>;
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};
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ap_pinctrl: pinctrl {
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compatible = "marvell,ap806-pinctrl";
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uart0_pins: uart0-pins {
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marvell,pins = "mpp11", "mpp19";
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marvell,function = "uart0";
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};
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};
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ap_gpio: gpio@1040 {
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compatible = "marvell,armada-8k-gpio";
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offset = <0x1040>;
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ngpios = <20>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&ap_pinctrl 0 0 20>;
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};
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};
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};
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};
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};
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