mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 00:47:22 +07:00
2a55c9a7ff
Current 3D driver expects this behaviour. While this could be changed, there's no compelling reason to reserve more than one subchannel for the DRM. If we ever need to use an object other then M2MF, we can just re-bind subchannel 0 as required. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
566 lines
13 KiB
C
566 lines
13 KiB
C
/*
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* Copyright (C) 2007 Ben Skeggs.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "nouveau_drv.h"
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#include "nouveau_ramht.h"
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#include "nouveau_dma.h"
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#define USE_REFCNT(dev) (nouveau_private(dev)->chipset >= 0x10)
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#define USE_SEMA(dev) (nouveau_private(dev)->chipset >= 0x17 && \
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nouveau_private(dev)->card_type < NV_C0)
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struct nouveau_fence {
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struct nouveau_channel *channel;
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struct kref refcount;
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struct list_head entry;
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uint32_t sequence;
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bool signalled;
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void (*work)(void *priv, bool signalled);
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void *priv;
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};
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struct nouveau_semaphore {
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struct kref ref;
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struct drm_device *dev;
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struct drm_mm_node *mem;
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};
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static inline struct nouveau_fence *
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nouveau_fence(void *sync_obj)
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{
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return (struct nouveau_fence *)sync_obj;
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}
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static void
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nouveau_fence_del(struct kref *ref)
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{
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struct nouveau_fence *fence =
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container_of(ref, struct nouveau_fence, refcount);
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nouveau_channel_ref(NULL, &fence->channel);
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kfree(fence);
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}
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void
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nouveau_fence_update(struct nouveau_channel *chan)
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{
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struct drm_device *dev = chan->dev;
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struct nouveau_fence *tmp, *fence;
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uint32_t sequence;
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spin_lock(&chan->fence.lock);
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/* Fetch the last sequence if the channel is still up and running */
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if (likely(!list_empty(&chan->fence.pending))) {
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if (USE_REFCNT(dev))
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sequence = nvchan_rd32(chan, 0x48);
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else
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sequence = atomic_read(&chan->fence.last_sequence_irq);
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if (chan->fence.sequence_ack == sequence)
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goto out;
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chan->fence.sequence_ack = sequence;
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}
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list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
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sequence = fence->sequence;
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fence->signalled = true;
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list_del(&fence->entry);
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if (unlikely(fence->work))
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fence->work(fence->priv, true);
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kref_put(&fence->refcount, nouveau_fence_del);
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if (sequence == chan->fence.sequence_ack)
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break;
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}
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out:
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spin_unlock(&chan->fence.lock);
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}
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int
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nouveau_fence_new(struct nouveau_channel *chan, struct nouveau_fence **pfence,
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bool emit)
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{
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struct nouveau_fence *fence;
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int ret = 0;
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fence = kzalloc(sizeof(*fence), GFP_KERNEL);
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if (!fence)
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return -ENOMEM;
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kref_init(&fence->refcount);
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nouveau_channel_ref(chan, &fence->channel);
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if (emit)
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ret = nouveau_fence_emit(fence);
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if (ret)
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nouveau_fence_unref(&fence);
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*pfence = fence;
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return ret;
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}
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struct nouveau_channel *
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nouveau_fence_channel(struct nouveau_fence *fence)
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{
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return fence ? nouveau_channel_get_unlocked(fence->channel) : NULL;
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}
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int
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nouveau_fence_emit(struct nouveau_fence *fence)
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{
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struct nouveau_channel *chan = fence->channel;
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struct drm_device *dev = chan->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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int ret;
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ret = RING_SPACE(chan, 2);
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if (ret)
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return ret;
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if (unlikely(chan->fence.sequence == chan->fence.sequence_ack - 1)) {
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nouveau_fence_update(chan);
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BUG_ON(chan->fence.sequence ==
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chan->fence.sequence_ack - 1);
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}
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fence->sequence = ++chan->fence.sequence;
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kref_get(&fence->refcount);
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spin_lock(&chan->fence.lock);
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list_add_tail(&fence->entry, &chan->fence.pending);
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spin_unlock(&chan->fence.lock);
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if (USE_REFCNT(dev)) {
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if (dev_priv->card_type < NV_C0)
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BEGIN_RING(chan, NvSubSw, 0x0050, 1);
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else
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BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0050, 1);
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} else {
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BEGIN_RING(chan, NvSubSw, 0x0150, 1);
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}
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OUT_RING (chan, fence->sequence);
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FIRE_RING(chan);
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return 0;
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}
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void
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nouveau_fence_work(struct nouveau_fence *fence,
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void (*work)(void *priv, bool signalled),
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void *priv)
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{
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BUG_ON(fence->work);
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spin_lock(&fence->channel->fence.lock);
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if (fence->signalled) {
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work(priv, true);
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} else {
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fence->work = work;
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fence->priv = priv;
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}
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spin_unlock(&fence->channel->fence.lock);
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}
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void
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__nouveau_fence_unref(void **sync_obj)
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{
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struct nouveau_fence *fence = nouveau_fence(*sync_obj);
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if (fence)
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kref_put(&fence->refcount, nouveau_fence_del);
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*sync_obj = NULL;
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}
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void *
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__nouveau_fence_ref(void *sync_obj)
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{
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struct nouveau_fence *fence = nouveau_fence(sync_obj);
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kref_get(&fence->refcount);
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return sync_obj;
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}
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bool
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__nouveau_fence_signalled(void *sync_obj, void *sync_arg)
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{
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struct nouveau_fence *fence = nouveau_fence(sync_obj);
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struct nouveau_channel *chan = fence->channel;
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if (fence->signalled)
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return true;
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nouveau_fence_update(chan);
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return fence->signalled;
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}
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int
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__nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
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{
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unsigned long timeout = jiffies + (3 * DRM_HZ);
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unsigned long sleep_time = jiffies + 1;
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int ret = 0;
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while (1) {
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if (__nouveau_fence_signalled(sync_obj, sync_arg))
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break;
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if (time_after_eq(jiffies, timeout)) {
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ret = -EBUSY;
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break;
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}
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__set_current_state(intr ? TASK_INTERRUPTIBLE
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: TASK_UNINTERRUPTIBLE);
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if (lazy && time_after_eq(jiffies, sleep_time))
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schedule_timeout(1);
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if (intr && signal_pending(current)) {
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ret = -ERESTARTSYS;
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break;
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}
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}
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__set_current_state(TASK_RUNNING);
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return ret;
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}
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static struct nouveau_semaphore *
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alloc_semaphore(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_semaphore *sema;
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int ret;
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if (!USE_SEMA(dev))
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return NULL;
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sema = kmalloc(sizeof(*sema), GFP_KERNEL);
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if (!sema)
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goto fail;
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ret = drm_mm_pre_get(&dev_priv->fence.heap);
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if (ret)
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goto fail;
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spin_lock(&dev_priv->fence.lock);
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sema->mem = drm_mm_search_free(&dev_priv->fence.heap, 4, 0, 0);
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if (sema->mem)
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sema->mem = drm_mm_get_block_atomic(sema->mem, 4, 0);
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spin_unlock(&dev_priv->fence.lock);
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if (!sema->mem)
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goto fail;
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kref_init(&sema->ref);
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sema->dev = dev;
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nouveau_bo_wr32(dev_priv->fence.bo, sema->mem->start / 4, 0);
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return sema;
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fail:
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kfree(sema);
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return NULL;
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}
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static void
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free_semaphore(struct kref *ref)
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{
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struct nouveau_semaphore *sema =
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container_of(ref, struct nouveau_semaphore, ref);
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struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
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spin_lock(&dev_priv->fence.lock);
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drm_mm_put_block(sema->mem);
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spin_unlock(&dev_priv->fence.lock);
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kfree(sema);
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}
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static void
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semaphore_work(void *priv, bool signalled)
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{
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struct nouveau_semaphore *sema = priv;
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struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
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if (unlikely(!signalled))
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nouveau_bo_wr32(dev_priv->fence.bo, sema->mem->start / 4, 1);
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kref_put(&sema->ref, free_semaphore);
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}
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static int
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emit_semaphore(struct nouveau_channel *chan, int method,
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struct nouveau_semaphore *sema)
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{
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struct drm_nouveau_private *dev_priv = sema->dev->dev_private;
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struct nouveau_fence *fence;
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bool smart = (dev_priv->card_type >= NV_50);
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int ret;
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ret = RING_SPACE(chan, smart ? 8 : 4);
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if (ret)
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return ret;
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if (smart) {
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BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
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OUT_RING(chan, NvSema);
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}
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BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_OFFSET, 1);
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OUT_RING(chan, sema->mem->start);
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if (smart && method == NV_SW_SEMAPHORE_ACQUIRE) {
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/*
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* NV50 tries to be too smart and context-switch
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* between semaphores instead of doing a "first come,
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* first served" strategy like previous cards
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* do.
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*
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* That's bad because the ACQUIRE latency can get as
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* large as the PFIFO context time slice in the
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* typical DRI2 case where you have several
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* outstanding semaphores at the same moment.
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*
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* If we're going to ACQUIRE, force the card to
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* context switch before, just in case the matching
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* RELEASE is already scheduled to be executed in
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* another channel.
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*/
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BEGIN_RING(chan, NvSubSw, NV_SW_YIELD, 1);
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OUT_RING(chan, 0);
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}
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BEGIN_RING(chan, NvSubSw, method, 1);
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OUT_RING(chan, 1);
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if (smart && method == NV_SW_SEMAPHORE_RELEASE) {
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/*
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* Force the card to context switch, there may be
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* another channel waiting for the semaphore we just
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* released.
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*/
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BEGIN_RING(chan, NvSubSw, NV_SW_YIELD, 1);
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OUT_RING(chan, 0);
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}
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/* Delay semaphore destruction until its work is done */
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ret = nouveau_fence_new(chan, &fence, true);
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if (ret)
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return ret;
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kref_get(&sema->ref);
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nouveau_fence_work(fence, semaphore_work, sema);
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nouveau_fence_unref(&fence);
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return 0;
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}
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int
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nouveau_fence_sync(struct nouveau_fence *fence,
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struct nouveau_channel *wchan)
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{
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struct nouveau_channel *chan = nouveau_fence_channel(fence);
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struct drm_device *dev = wchan->dev;
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struct nouveau_semaphore *sema;
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int ret = 0;
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if (likely(!chan || chan == wchan ||
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nouveau_fence_signalled(fence)))
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goto out;
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sema = alloc_semaphore(dev);
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if (!sema) {
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/* Early card or broken userspace, fall back to
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* software sync. */
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ret = nouveau_fence_wait(fence, true, false);
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goto out;
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}
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|
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/* try to take chan's mutex, if we can't take it right away
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* we have to fallback to software sync to prevent locking
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* order issues
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*/
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if (!mutex_trylock(&chan->mutex)) {
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ret = nouveau_fence_wait(fence, true, false);
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goto out_unref;
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}
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|
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/* Make wchan wait until it gets signalled */
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ret = emit_semaphore(wchan, NV_SW_SEMAPHORE_ACQUIRE, sema);
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if (ret)
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goto out_unlock;
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|
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/* Signal the semaphore from chan */
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ret = emit_semaphore(chan, NV_SW_SEMAPHORE_RELEASE, sema);
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|
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out_unlock:
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mutex_unlock(&chan->mutex);
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out_unref:
|
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kref_put(&sema->ref, free_semaphore);
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out:
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if (chan)
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nouveau_channel_put_unlocked(&chan);
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return ret;
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}
|
|
|
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int
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__nouveau_fence_flush(void *sync_obj, void *sync_arg)
|
|
{
|
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return 0;
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|
}
|
|
|
|
int
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nouveau_fence_channel_init(struct nouveau_channel *chan)
|
|
{
|
|
struct drm_device *dev = chan->dev;
|
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struct drm_nouveau_private *dev_priv = dev->dev_private;
|
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struct nouveau_gpuobj *obj = NULL;
|
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int ret;
|
|
|
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/* Create an NV_SW object for various sync purposes */
|
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ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);
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if (ret)
|
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return ret;
|
|
|
|
/* we leave subchannel empty for nvc0 */
|
|
if (dev_priv->card_type < NV_C0) {
|
|
ret = RING_SPACE(chan, 2);
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if (ret)
|
|
return ret;
|
|
BEGIN_RING(chan, NvSubSw, 0, 1);
|
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OUT_RING(chan, NvSw);
|
|
}
|
|
|
|
/* Create a DMA object for the shared cross-channel sync area. */
|
|
if (USE_SEMA(dev)) {
|
|
struct ttm_mem_reg *mem = &dev_priv->fence.bo->bo.mem;
|
|
|
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ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY,
|
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mem->start << PAGE_SHIFT,
|
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mem->size, NV_MEM_ACCESS_RW,
|
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NV_MEM_TARGET_VRAM, &obj);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = nouveau_ramht_insert(chan, NvSema, obj);
|
|
nouveau_gpuobj_ref(NULL, &obj);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = RING_SPACE(chan, 2);
|
|
if (ret)
|
|
return ret;
|
|
BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
|
|
OUT_RING(chan, NvSema);
|
|
}
|
|
|
|
FIRE_RING(chan);
|
|
|
|
INIT_LIST_HEAD(&chan->fence.pending);
|
|
spin_lock_init(&chan->fence.lock);
|
|
atomic_set(&chan->fence.last_sequence_irq, 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
nouveau_fence_channel_fini(struct nouveau_channel *chan)
|
|
{
|
|
struct nouveau_fence *tmp, *fence;
|
|
|
|
spin_lock(&chan->fence.lock);
|
|
|
|
list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) {
|
|
fence->signalled = true;
|
|
list_del(&fence->entry);
|
|
|
|
if (unlikely(fence->work))
|
|
fence->work(fence->priv, false);
|
|
|
|
kref_put(&fence->refcount, nouveau_fence_del);
|
|
}
|
|
|
|
spin_unlock(&chan->fence.lock);
|
|
}
|
|
|
|
int
|
|
nouveau_fence_init(struct drm_device *dev)
|
|
{
|
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
|
int ret;
|
|
|
|
/* Create a shared VRAM heap for cross-channel sync. */
|
|
if (USE_SEMA(dev)) {
|
|
ret = nouveau_bo_new(dev, NULL, 4096, 0, TTM_PL_FLAG_VRAM,
|
|
0, 0, false, true, &dev_priv->fence.bo);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = nouveau_bo_pin(dev_priv->fence.bo, TTM_PL_FLAG_VRAM);
|
|
if (ret)
|
|
goto fail;
|
|
|
|
ret = nouveau_bo_map(dev_priv->fence.bo);
|
|
if (ret)
|
|
goto fail;
|
|
|
|
ret = drm_mm_init(&dev_priv->fence.heap, 0,
|
|
dev_priv->fence.bo->bo.mem.size);
|
|
if (ret)
|
|
goto fail;
|
|
|
|
spin_lock_init(&dev_priv->fence.lock);
|
|
}
|
|
|
|
return 0;
|
|
fail:
|
|
nouveau_bo_unmap(dev_priv->fence.bo);
|
|
nouveau_bo_ref(NULL, &dev_priv->fence.bo);
|
|
return ret;
|
|
}
|
|
|
|
void
|
|
nouveau_fence_fini(struct drm_device *dev)
|
|
{
|
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
|
|
|
if (USE_SEMA(dev)) {
|
|
drm_mm_takedown(&dev_priv->fence.heap);
|
|
nouveau_bo_unmap(dev_priv->fence.bo);
|
|
nouveau_bo_unpin(dev_priv->fence.bo);
|
|
nouveau_bo_ref(NULL, &dev_priv->fence.bo);
|
|
}
|
|
}
|