mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 01:56:57 +07:00
35630df68d
Add driver for STMicroelectronics ST21NFCB NFC controller. ST21NFCB is using NCI protocol and a proprietary low level transport protocol called NDLC used on top. NDLC: The protocol defines 2 types of frame: - One type carrying NCI data (referred as DATAFRAME frames). - One type carrying protocol information used for flow control and error control mechanisms (referred as SUPERVISOR frames). After each frame transmission to the NFC controller, the device host SHALL waitfor an ACK (SUPERVISOR frame) reception before sending a new frame. The NFC controller MAY send a frame at anytime to the device host. The NFC controller MAY send a specific WAIT supervisor frame to indicate to device host that a NCI data packet has been received but that it could take significant time before the NFC controller sends an ACK and thus allows next data reception. Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
299 lines
7.4 KiB
C
299 lines
7.4 KiB
C
/*
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* Low Level Transport (NDLC) Driver for STMicroelectronics NFC Chip
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*
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* Copyright (C) 2014 STMicroelectronics SAS. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/sched.h>
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#include <net/nfc/nci_core.h>
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#include "ndlc.h"
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#include "st21nfcb.h"
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#define NDLC_TIMER_T1 100
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#define NDLC_TIMER_T1_WAIT 400
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#define NDLC_TIMER_T2 1200
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#define PCB_TYPE_DATAFRAME 0x80
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#define PCB_TYPE_SUPERVISOR 0xc0
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#define PCB_TYPE_MASK PCB_TYPE_SUPERVISOR
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#define PCB_SYNC_ACK 0x20
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#define PCB_SYNC_NACK 0x10
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#define PCB_SYNC_WAIT 0x30
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#define PCB_SYNC_NOINFO 0x00
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#define PCB_SYNC_MASK PCB_SYNC_WAIT
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#define PCB_DATAFRAME_RETRANSMIT_YES 0x00
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#define PCB_DATAFRAME_RETRANSMIT_NO 0x04
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#define PCB_DATAFRAME_RETRANSMIT_MASK PCB_DATAFRAME_RETRANSMIT_NO
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#define PCB_SUPERVISOR_RETRANSMIT_YES 0x00
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#define PCB_SUPERVISOR_RETRANSMIT_NO 0x02
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#define PCB_SUPERVISOR_RETRANSMIT_MASK PCB_SUPERVISOR_RETRANSMIT_NO
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#define PCB_FRAME_CRC_INFO_PRESENT 0x08
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#define PCB_FRAME_CRC_INFO_NOTPRESENT 0x00
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#define PCB_FRAME_CRC_INFO_MASK PCB_FRAME_CRC_INFO_PRESENT
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#define NDLC_DUMP_SKB(info, skb) \
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do { \
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pr_debug("%s:\n", info); \
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print_hex_dump(KERN_DEBUG, "ndlc: ", DUMP_PREFIX_OFFSET, \
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16, 1, skb->data, skb->len, 0); \
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} while (0)
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int ndlc_open(struct llt_ndlc *ndlc)
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{
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/* toggle reset pin */
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ndlc->ops->enable(ndlc->phy_id);
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return 0;
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}
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EXPORT_SYMBOL(ndlc_open);
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void ndlc_close(struct llt_ndlc *ndlc)
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{
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/* toggle reset pin */
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ndlc->ops->disable(ndlc->phy_id);
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}
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EXPORT_SYMBOL(ndlc_close);
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int ndlc_send(struct llt_ndlc *ndlc, struct sk_buff *skb)
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{
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/* add ndlc header */
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u8 pcb = PCB_TYPE_DATAFRAME | PCB_DATAFRAME_RETRANSMIT_NO |
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PCB_FRAME_CRC_INFO_NOTPRESENT;
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*skb_push(skb, 1) = pcb;
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skb_queue_tail(&ndlc->send_q, skb);
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schedule_work(&ndlc->sm_work);
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return 0;
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}
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EXPORT_SYMBOL(ndlc_send);
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static void llt_ndlc_send_queue(struct llt_ndlc *ndlc)
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{
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struct sk_buff *skb;
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int r;
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unsigned long time_sent;
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if (ndlc->send_q.qlen)
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pr_debug("sendQlen=%d unackQlen=%d\n",
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ndlc->send_q.qlen, ndlc->ack_pending_q.qlen);
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while (ndlc->send_q.qlen) {
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skb = skb_dequeue(&ndlc->send_q);
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NDLC_DUMP_SKB("ndlc frame written", skb);
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r = ndlc->ops->write(ndlc->phy_id, skb);
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if (r < 0) {
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ndlc->hard_fault = r;
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break;
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}
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time_sent = jiffies;
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*(unsigned long *)skb->cb = time_sent;
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skb_queue_tail(&ndlc->ack_pending_q, skb);
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/* start timer t1 for ndlc aknowledge */
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ndlc->t1_active = true;
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mod_timer(&ndlc->t1_timer, time_sent +
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msecs_to_jiffies(NDLC_TIMER_T1));
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}
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}
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static void llt_ndlc_requeue_data_pending(struct llt_ndlc *ndlc)
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{
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struct sk_buff *skb;
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u8 pcb;
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while ((skb = skb_dequeue_tail(&ndlc->ack_pending_q))) {
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pcb = skb->data[0];
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switch (pcb & PCB_TYPE_MASK) {
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case PCB_TYPE_SUPERVISOR:
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skb->data[0] = (pcb & ~PCB_SUPERVISOR_RETRANSMIT_MASK) |
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PCB_SUPERVISOR_RETRANSMIT_YES;
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break;
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case PCB_TYPE_DATAFRAME:
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skb->data[0] = (pcb & ~PCB_DATAFRAME_RETRANSMIT_MASK) |
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PCB_DATAFRAME_RETRANSMIT_YES;
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break;
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default:
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pr_err("UNKNOWN Packet Control Byte=%d\n", pcb);
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kfree_skb(skb);
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break;
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}
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skb_queue_head(&ndlc->send_q, skb);
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}
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}
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static void llt_ndlc_rcv_queue(struct llt_ndlc *ndlc)
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{
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struct sk_buff *skb;
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u8 pcb;
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unsigned long time_sent;
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if (ndlc->rcv_q.qlen)
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pr_debug("rcvQlen=%d\n", ndlc->rcv_q.qlen);
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while ((skb = skb_dequeue(&ndlc->rcv_q)) != NULL) {
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pcb = skb->data[0];
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skb_pull(skb, 1);
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if ((pcb & PCB_TYPE_MASK) == PCB_TYPE_SUPERVISOR) {
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switch (pcb & PCB_SYNC_MASK) {
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case PCB_SYNC_ACK:
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del_timer_sync(&ndlc->t1_timer);
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del_timer_sync(&ndlc->t2_timer);
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ndlc->t2_active = false;
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ndlc->t1_active = false;
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break;
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case PCB_SYNC_NACK:
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llt_ndlc_requeue_data_pending(ndlc);
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llt_ndlc_send_queue(ndlc);
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/* start timer t1 for ndlc aknowledge */
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time_sent = jiffies;
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ndlc->t1_active = true;
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mod_timer(&ndlc->t1_timer, time_sent +
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msecs_to_jiffies(NDLC_TIMER_T1));
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break;
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case PCB_SYNC_WAIT:
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time_sent = jiffies;
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ndlc->t1_active = true;
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mod_timer(&ndlc->t1_timer, time_sent +
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msecs_to_jiffies(NDLC_TIMER_T1_WAIT));
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break;
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default:
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pr_err("UNKNOWN Packet Control Byte=%d\n", pcb);
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kfree_skb(skb);
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break;
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}
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} else {
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nci_recv_frame(ndlc->ndev, skb);
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}
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}
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}
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static void llt_ndlc_sm_work(struct work_struct *work)
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{
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struct llt_ndlc *ndlc = container_of(work, struct llt_ndlc, sm_work);
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llt_ndlc_send_queue(ndlc);
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llt_ndlc_rcv_queue(ndlc);
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if (ndlc->t1_active && timer_pending(&ndlc->t1_timer) == 0) {
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pr_debug
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("Handle T1(recv SUPERVISOR) elapsed (T1 now inactive)\n");
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ndlc->t1_active = false;
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llt_ndlc_requeue_data_pending(ndlc);
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llt_ndlc_send_queue(ndlc);
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}
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if (ndlc->t2_active && timer_pending(&ndlc->t2_timer) == 0) {
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pr_debug("Handle T2(recv DATA) elapsed (T2 now inactive)\n");
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ndlc->t2_active = false;
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ndlc->t1_active = false;
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del_timer_sync(&ndlc->t1_timer);
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ndlc_close(ndlc);
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ndlc->hard_fault = -EREMOTEIO;
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}
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}
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void ndlc_recv(struct llt_ndlc *ndlc, struct sk_buff *skb)
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{
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if (skb == NULL) {
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pr_err("NULL Frame -> link is dead\n");
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ndlc->hard_fault = -EREMOTEIO;
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ndlc_close(ndlc);
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} else {
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NDLC_DUMP_SKB("incoming frame", skb);
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skb_queue_tail(&ndlc->rcv_q, skb);
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}
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schedule_work(&ndlc->sm_work);
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}
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EXPORT_SYMBOL(ndlc_recv);
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static void ndlc_t1_timeout(unsigned long data)
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{
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struct llt_ndlc *ndlc = (struct llt_ndlc *)data;
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pr_debug("\n");
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schedule_work(&ndlc->sm_work);
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}
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static void ndlc_t2_timeout(unsigned long data)
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{
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struct llt_ndlc *ndlc = (struct llt_ndlc *)data;
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pr_debug("\n");
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schedule_work(&ndlc->sm_work);
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}
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int ndlc_probe(void *phy_id, struct nfc_phy_ops *phy_ops, struct device *dev,
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int phy_headroom, int phy_tailroom, struct llt_ndlc **ndlc_id)
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{
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struct llt_ndlc *ndlc;
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ndlc = devm_kzalloc(dev, sizeof(struct llt_ndlc), GFP_KERNEL);
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if (!ndlc) {
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nfc_err(dev, "Cannot allocate memory for ndlc.\n");
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return -ENOMEM;
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}
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ndlc->ops = phy_ops;
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ndlc->phy_id = phy_id;
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ndlc->dev = dev;
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*ndlc_id = ndlc;
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/* start timers */
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init_timer(&ndlc->t1_timer);
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ndlc->t1_timer.data = (unsigned long)ndlc;
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ndlc->t1_timer.function = ndlc_t1_timeout;
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init_timer(&ndlc->t2_timer);
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ndlc->t2_timer.data = (unsigned long)ndlc;
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ndlc->t2_timer.function = ndlc_t2_timeout;
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skb_queue_head_init(&ndlc->rcv_q);
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skb_queue_head_init(&ndlc->send_q);
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skb_queue_head_init(&ndlc->ack_pending_q);
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INIT_WORK(&ndlc->sm_work, llt_ndlc_sm_work);
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return st21nfcb_nci_probe(ndlc, phy_headroom, phy_tailroom);
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}
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EXPORT_SYMBOL(ndlc_probe);
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void ndlc_remove(struct llt_ndlc *ndlc)
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{
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/* cancel timers */
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del_timer_sync(&ndlc->t1_timer);
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del_timer_sync(&ndlc->t2_timer);
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ndlc->t2_active = false;
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ndlc->t1_active = false;
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skb_queue_purge(&ndlc->rcv_q);
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skb_queue_purge(&ndlc->send_q);
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st21nfcb_nci_remove(ndlc->ndev);
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kfree(ndlc);
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}
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EXPORT_SYMBOL(ndlc_remove);
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