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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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73317712d9
Add a pincontrol driver for pxa2xx architecture, encompassing all pxa25x and pxa27x variants. This is only the pin muxing part of the driver. One specific consideration is also the memory space (MMIO), which is intertwined with the GPIO registers. To make things worse, the GPIO direction register also affect pin muxing, as it chooses the "kind" of pin, ie. the 4 output functions or 4 input functions. The mapping between pinctrl notions and PXA Technical Reference Manual is as follows : - a pin is obviously a pin - a group is also a pin, ie. group P101 is the pin 101 - a mux function is an alternate function (ie. gpio-in, gpio-out, MMCLK, BTRTS, etc ...) The individual architecture (pxa27x, pxa25x) instantiate a pin control by providing a table of pins, each pin being provided a list of PXA_FUNCTION (alternate functions). Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
93 lines
2.0 KiB
C
93 lines
2.0 KiB
C
/*
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* Marvell PXA2xx family pin control
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*
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* Copyright (C) 2015 Robert Jarzmik
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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*/
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#ifndef __PINCTRL_PXA_H
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#define __PINCTRL_PXA_H
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#define PXA_FUNCTION(_dir, _af, _name) \
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{ \
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.name = _name, \
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.muxval = (_dir | (_af << 1)), \
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}
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#define PXA_PIN(_pin, funcs...) \
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{ \
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.pin = _pin, \
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.functions = (struct pxa_desc_function[]){ \
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funcs, { } }, \
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}
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#define PXA_GPIO_PIN(_pin, funcs...) \
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{ \
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.pin = _pin, \
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.functions = (struct pxa_desc_function[]){ \
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PXA_FUNCTION(0, 0, "gpio_in"), \
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PXA_FUNCTION(1, 0, "gpio_out"), \
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funcs, { } }, \
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}
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#define PXA_GPIO_ONLY_PIN(_pin) \
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{ \
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.pin = _pin, \
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.functions = (struct pxa_desc_function[]){ \
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PXA_FUNCTION(0, 0, "gpio_in"), \
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PXA_FUNCTION(1, 0, "gpio_out"), \
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{ } }, \
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}
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#define PXA_PINCTRL_PIN(pin) \
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PINCTRL_PIN(pin, "P" #pin)
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struct pxa_desc_function {
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const char *name;
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u8 muxval;
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};
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struct pxa_desc_pin {
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struct pinctrl_pin_desc pin;
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struct pxa_desc_function *functions;
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};
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struct pxa_pinctrl_group {
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const char *name;
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unsigned pin;
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};
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struct pxa_pinctrl_function {
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const char *name;
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const char **groups;
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unsigned ngroups;
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};
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struct pxa_pinctrl {
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spinlock_t lock;
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void __iomem **base_gafr;
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void __iomem **base_gpdr;
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void __iomem **base_pgsr;
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struct device *dev;
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struct pinctrl_desc desc;
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struct pinctrl_dev *pctl_dev;
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unsigned npins;
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const struct pxa_desc_pin *ppins;
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unsigned ngroups;
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struct pxa_pinctrl_group *groups;
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unsigned nfuncs;
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struct pxa_pinctrl_function *functions;
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char *name;
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};
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int pxa2xx_pinctrl_init(struct platform_device *pdev,
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const struct pxa_desc_pin *ppins, int npins,
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void __iomem *base_gafr[], void __iomem *base_gpdr[],
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void __iomem *base_gpsr[]);
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#endif /* __PINCTRL_PXA_H */
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