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c51ba54f63
The #reset-cells was listed as optional in the bindings for
qcom,sdm845-videocc. There's no reason for it to be optional. As per
Stephen [1]:
> We should update the binding to make it a required property. It
> doesn't make any sense why that property would be optional given
> that the hardware either has support for resets or it doesn't.
sdm845 support is still in its infancy so we shouldn't be affecting
any real device trees by modifying the bindings here.
[1] https://lkml.kernel.org/r/154330186815.88331.12720647562079303842@swboyd.mtv.corp.google.com
Fixes: 84b66b2116 ("dt-bindings: clock: Introduce QCOM Video clock bindings")
Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
19 lines
615 B
Plaintext
19 lines
615 B
Plaintext
Qualcomm Video Clock & Reset Controller Binding
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Required properties :
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- compatible : shall contain "qcom,sdm845-videocc"
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- reg : shall contain base register location and length
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- #clock-cells : from common clock binding, shall contain 1.
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- #power-domain-cells : from generic power domain binding, shall contain 1.
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- #reset-cells : from common reset binding, shall contain 1.
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Example:
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videocc: clock-controller@ab00000 {
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compatible = "qcom,sdm845-videocc";
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reg = <0xab00000 0x10000>;
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#clock-cells = <1>;
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#power-domain-cells = <1>;
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#reset-cells = <1>;
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};
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