mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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44ce6a5ee7
Merge the defines of STACKFRAMESIZE, STK_REG, STK_PARAM from different places. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
269 lines
5.4 KiB
ArmAsm
269 lines
5.4 KiB
ArmAsm
/*
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* This file contains the generic code to perform a call to the
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* pSeries LPAR hypervisor.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/hvcall.h>
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#include <asm/processor.h>
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#include <asm/ppc_asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/ptrace.h>
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#ifdef CONFIG_TRACEPOINTS
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.section ".toc","aw"
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.globl hcall_tracepoint_refcount
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hcall_tracepoint_refcount:
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.llong 0
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.section ".text"
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/*
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* precall must preserve all registers. use unused STK_PARAM()
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* areas to save snapshots and opcode. We branch around this
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* in early init (eg when populating the MMU hashtable) by using an
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* unconditional cpu feature.
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*/
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#define HCALL_INST_PRECALL(FIRST_REG) \
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BEGIN_FTR_SECTION; \
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b 1f; \
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END_FTR_SECTION(0, 1); \
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ld r12,hcall_tracepoint_refcount@toc(r2); \
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std r12,32(r1); \
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cmpdi r12,0; \
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beq+ 1f; \
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mflr r0; \
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std r3,STK_PARAM(R3)(r1); \
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std r4,STK_PARAM(R4)(r1); \
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std r5,STK_PARAM(R5)(r1); \
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std r6,STK_PARAM(R6)(r1); \
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std r7,STK_PARAM(R7)(r1); \
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std r8,STK_PARAM(R8)(r1); \
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std r9,STK_PARAM(R9)(r1); \
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std r10,STK_PARAM(R10)(r1); \
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std r0,16(r1); \
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addi r4,r1,STK_PARAM(FIRST_REG); \
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stdu r1,-STACK_FRAME_OVERHEAD(r1); \
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bl .__trace_hcall_entry; \
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addi r1,r1,STACK_FRAME_OVERHEAD; \
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ld r0,16(r1); \
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ld r3,STK_PARAM(R3)(r1); \
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ld r4,STK_PARAM(R4)(r1); \
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ld r5,STK_PARAM(R5)(r1); \
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ld r6,STK_PARAM(R6)(r1); \
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ld r7,STK_PARAM(R7)(r1); \
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ld r8,STK_PARAM(R8)(r1); \
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ld r9,STK_PARAM(R9)(r1); \
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ld r10,STK_PARAM(R10)(r1); \
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mtlr r0; \
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1:
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/*
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* postcall is performed immediately before function return which
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* allows liberal use of volatile registers. We branch around this
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* in early init (eg when populating the MMU hashtable) by using an
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* unconditional cpu feature.
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*/
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#define __HCALL_INST_POSTCALL \
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BEGIN_FTR_SECTION; \
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b 1f; \
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END_FTR_SECTION(0, 1); \
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ld r12,32(r1); \
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cmpdi r12,0; \
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beq+ 1f; \
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mflr r0; \
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ld r6,STK_PARAM(R3)(r1); \
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std r3,STK_PARAM(R3)(r1); \
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mr r4,r3; \
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mr r3,r6; \
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std r0,16(r1); \
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stdu r1,-STACK_FRAME_OVERHEAD(r1); \
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bl .__trace_hcall_exit; \
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addi r1,r1,STACK_FRAME_OVERHEAD; \
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ld r0,16(r1); \
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ld r3,STK_PARAM(R3)(r1); \
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mtlr r0; \
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1:
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#define HCALL_INST_POSTCALL_NORETS \
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li r5,0; \
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__HCALL_INST_POSTCALL
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#define HCALL_INST_POSTCALL(BUFREG) \
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mr r5,BUFREG; \
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__HCALL_INST_POSTCALL
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#else
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#define HCALL_INST_PRECALL(FIRST_ARG)
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#define HCALL_INST_POSTCALL_NORETS
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#define HCALL_INST_POSTCALL(BUFREG)
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#endif
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.text
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_GLOBAL(plpar_hcall_norets)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL(R4)
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HVSC /* invoke the hypervisor */
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HCALL_INST_POSTCALL_NORETS
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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_GLOBAL(plpar_hcall)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL(R5)
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std r4,STK_PARAM(R4)(r1) /* Save ret buffer */
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mr r4,r5
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mr r5,r6
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mr r6,r7
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mr r7,r8
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mr r8,r9
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mr r9,r10
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HVSC /* invoke the hypervisor */
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ld r12,STK_PARAM(R4)(r1)
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std r4, 0(r12)
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std r5, 8(r12)
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std r6, 16(r12)
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std r7, 24(r12)
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HCALL_INST_POSTCALL(r12)
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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/*
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* plpar_hcall_raw can be called in real mode. kexec/kdump need some
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* hypervisor calls to be executed in real mode. So plpar_hcall_raw
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* does not access the per cpu hypervisor call statistics variables,
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* since these variables may not be present in the RMO region.
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*/
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_GLOBAL(plpar_hcall_raw)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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std r4,STK_PARAM(R4)(r1) /* Save ret buffer */
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mr r4,r5
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mr r5,r6
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mr r6,r7
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mr r7,r8
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mr r8,r9
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mr r9,r10
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HVSC /* invoke the hypervisor */
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ld r12,STK_PARAM(R4)(r1)
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std r4, 0(r12)
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std r5, 8(r12)
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std r6, 16(r12)
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std r7, 24(r12)
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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_GLOBAL(plpar_hcall9)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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HCALL_INST_PRECALL(R5)
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std r4,STK_PARAM(R4)(r1) /* Save ret buffer */
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mr r4,r5
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mr r5,r6
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mr r6,r7
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mr r7,r8
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mr r8,r9
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mr r9,r10
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ld r10,STK_PARAM(R11)(r1) /* put arg7 in R10 */
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ld r11,STK_PARAM(R12)(r1) /* put arg8 in R11 */
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ld r12,STK_PARAM(R13)(r1) /* put arg9 in R12 */
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HVSC /* invoke the hypervisor */
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mr r0,r12
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ld r12,STK_PARAM(R4)(r1)
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std r4, 0(r12)
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std r5, 8(r12)
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std r6, 16(r12)
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std r7, 24(r12)
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std r8, 32(r12)
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std r9, 40(r12)
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std r10,48(r12)
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std r11,56(r12)
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std r0, 64(r12)
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HCALL_INST_POSTCALL(r12)
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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/* See plpar_hcall_raw to see why this is needed */
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_GLOBAL(plpar_hcall9_raw)
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HMT_MEDIUM
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mfcr r0
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stw r0,8(r1)
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std r4,STK_PARAM(R4)(r1) /* Save ret buffer */
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mr r4,r5
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mr r5,r6
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mr r6,r7
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mr r7,r8
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mr r8,r9
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mr r9,r10
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ld r10,STK_PARAM(R11)(r1) /* put arg7 in R10 */
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ld r11,STK_PARAM(R12)(r1) /* put arg8 in R11 */
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ld r12,STK_PARAM(R13)(r1) /* put arg9 in R12 */
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HVSC /* invoke the hypervisor */
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mr r0,r12
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ld r12,STK_PARAM(R4)(r1)
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std r4, 0(r12)
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std r5, 8(r12)
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std r6, 16(r12)
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std r7, 24(r12)
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std r8, 32(r12)
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std r9, 40(r12)
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std r10,48(r12)
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std r11,56(r12)
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std r0, 64(r12)
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lwz r0,8(r1)
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mtcrf 0xff,r0
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blr /* return r3 = status */
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