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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c50842df47
The Xtensa architecture provides a global register called THREADPTR for the purpose of Thread Local Storage (TLS) support. This allows us to use a fairly simple implementation, keeping the thread pointer in the regset and simply saving and restoring it upon entering/exiting the from user space. Signed-off-by: Chris Zankel <chris@zankel.net>
208 lines
5.7 KiB
C
208 lines
5.7 KiB
C
/*
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* include/asm-xtensa/elf.h
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*
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* ELF register definitions
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_ELF_H
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#define _XTENSA_ELF_H
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#include <asm/ptrace.h>
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#include <asm/coprocessor.h>
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/* Xtensa processor ELF architecture-magic number */
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#define EM_XTENSA 94
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#define EM_XTENSA_OLD 0xABC7
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/* Xtensa relocations defined by the ABIs */
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#define R_XTENSA_NONE 0
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#define R_XTENSA_32 1
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#define R_XTENSA_RTLD 2
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#define R_XTENSA_GLOB_DAT 3
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#define R_XTENSA_JMP_SLOT 4
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#define R_XTENSA_RELATIVE 5
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#define R_XTENSA_PLT 6
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#define R_XTENSA_OP0 8
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#define R_XTENSA_OP1 9
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#define R_XTENSA_OP2 10
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#define R_XTENSA_ASM_EXPAND 11
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#define R_XTENSA_ASM_SIMPLIFY 12
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#define R_XTENSA_GNU_VTINHERIT 15
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#define R_XTENSA_GNU_VTENTRY 16
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#define R_XTENSA_DIFF8 17
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#define R_XTENSA_DIFF16 18
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#define R_XTENSA_DIFF32 19
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#define R_XTENSA_SLOT0_OP 20
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#define R_XTENSA_SLOT1_OP 21
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#define R_XTENSA_SLOT2_OP 22
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#define R_XTENSA_SLOT3_OP 23
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#define R_XTENSA_SLOT4_OP 24
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#define R_XTENSA_SLOT5_OP 25
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#define R_XTENSA_SLOT6_OP 26
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#define R_XTENSA_SLOT7_OP 27
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#define R_XTENSA_SLOT8_OP 28
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#define R_XTENSA_SLOT9_OP 29
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#define R_XTENSA_SLOT10_OP 30
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#define R_XTENSA_SLOT11_OP 31
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#define R_XTENSA_SLOT12_OP 32
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#define R_XTENSA_SLOT13_OP 33
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#define R_XTENSA_SLOT14_OP 34
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#define R_XTENSA_SLOT0_ALT 35
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#define R_XTENSA_SLOT1_ALT 36
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#define R_XTENSA_SLOT2_ALT 37
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#define R_XTENSA_SLOT3_ALT 38
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#define R_XTENSA_SLOT4_ALT 39
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#define R_XTENSA_SLOT5_ALT 40
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#define R_XTENSA_SLOT6_ALT 41
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#define R_XTENSA_SLOT7_ALT 42
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#define R_XTENSA_SLOT8_ALT 43
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#define R_XTENSA_SLOT9_ALT 44
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#define R_XTENSA_SLOT10_ALT 45
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#define R_XTENSA_SLOT11_ALT 46
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#define R_XTENSA_SLOT12_ALT 47
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#define R_XTENSA_SLOT13_ALT 48
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#define R_XTENSA_SLOT14_ALT 49
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/* ELF register definitions. This is needed for core dump support. */
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typedef unsigned long elf_greg_t;
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typedef struct {
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elf_greg_t pc;
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elf_greg_t ps;
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elf_greg_t lbeg;
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elf_greg_t lend;
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elf_greg_t lcount;
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elf_greg_t sar;
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elf_greg_t windowstart;
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elf_greg_t windowbase;
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elf_greg_t threadptr;
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elf_greg_t reserved[7+48];
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elf_greg_t a[64];
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} xtensa_gregset_t;
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#define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))
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typedef elf_greg_t elf_gregset_t[ELF_NGREG];
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#define ELF_NFPREG 18
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typedef unsigned int elf_fpreg_t;
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typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
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#define ELF_CORE_COPY_REGS(_eregs, _pregs) \
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xtensa_elf_core_copy_regs ((xtensa_gregset_t*)&(_eregs), _pregs);
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extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *);
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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#define elf_check_arch(x) ( ( (x)->e_machine == EM_XTENSA ) || \
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( (x)->e_machine == EM_XTENSA_OLD ) )
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/*
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* These are used to set parameters in the core dumps.
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*/
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#ifdef __XTENSA_EL__
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# define ELF_DATA ELFDATA2LSB
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#elif defined(__XTENSA_EB__)
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# define ELF_DATA ELFDATA2MSB
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#else
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# error processor byte order undefined!
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#endif
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#define ELF_CLASS ELFCLASS32
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#define ELF_ARCH EM_XTENSA
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#define ELF_EXEC_PAGESIZE PAGE_SIZE
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/*
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* This is the location that an ET_DYN program is loaded if exec'ed. Typical
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* use of this is to invoke "./ld.so someprog" to test out a new version of
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* the loader. We need to make sure that it is out of the way of the program
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* that it will "exec", and that there is sufficient room for the brk.
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*/
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#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
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/*
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* This yields a mask that user programs can use to figure out what
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* instruction set this CPU supports. This could be done in user space,
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* but it's not easy, and we've already done it here.
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*/
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#define ELF_HWCAP (0)
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/*
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* This yields a string that ld.so will use to load implementation
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* specific libraries for optimization. This is more specific in
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* intent than poking at uname or /proc/cpuinfo.
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* For the moment, we have only optimizations for the Intel generations,
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* but that could change...
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*/
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#define ELF_PLATFORM (NULL)
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/*
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* The Xtensa processor ABI says that when the program starts, a2
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* contains a pointer to a function which might be registered using
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* `atexit'. This provides a mean for the dynamic linker to call
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* DT_FINI functions for shared libraries that have been loaded before
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* the code runs.
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*
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* A value of 0 tells we have no such handler.
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*
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* We might as well make sure everything else is cleared too (except
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* for the stack pointer in a1), just to make things more
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* deterministic. Also, clearing a0 terminates debugger backtraces.
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*/
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#define ELF_PLAT_INIT(_r, load_addr) \
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do { _r->areg[0]=0; /*_r->areg[1]=0;*/ _r->areg[2]=0; _r->areg[3]=0; \
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_r->areg[4]=0; _r->areg[5]=0; _r->areg[6]=0; _r->areg[7]=0; \
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_r->areg[8]=0; _r->areg[9]=0; _r->areg[10]=0; _r->areg[11]=0; \
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_r->areg[12]=0; _r->areg[13]=0; _r->areg[14]=0; _r->areg[15]=0; \
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} while (0)
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typedef struct {
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xtregs_opt_t opt;
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xtregs_user_t user;
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#if XTENSA_HAVE_COPROCESSORS
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xtregs_cp0_t cp0;
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xtregs_cp1_t cp1;
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xtregs_cp2_t cp2;
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xtregs_cp3_t cp3;
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xtregs_cp4_t cp4;
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xtregs_cp5_t cp5;
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xtregs_cp6_t cp6;
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xtregs_cp7_t cp7;
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#endif
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} elf_xtregs_t;
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#define SET_PERSONALITY(ex) \
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set_personality(PER_LINUX_32BIT | (current->personality & (~PER_MASK)))
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struct task_struct;
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extern void do_copy_regs (xtensa_gregset_t*, struct pt_regs*,
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struct task_struct*);
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extern void do_restore_regs (xtensa_gregset_t*, struct pt_regs*,
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struct task_struct*);
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extern void do_save_fpregs (elf_fpregset_t*, struct pt_regs*,
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struct task_struct*);
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extern int do_restore_fpregs (elf_fpregset_t*, struct pt_regs*,
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struct task_struct*);
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#endif /* _XTENSA_ELF_H */
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