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f79a13fe5c
Similar to MMP2 one, but has an extra range for the other core. The muxes stay the same. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Rob Herring <robh@kernel.org>
65 lines
2.4 KiB
Plaintext
65 lines
2.4 KiB
Plaintext
* Marvell MMP Interrupt controller
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Required properties:
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- compatible : Should be
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"mrvl,mmp-intc" on Marvel MMP,
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"mrvl,mmp2-intc" along with "mrvl,mmp2-mux-intc" on MMP2 or
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"marvell,mmp3-intc" with "mrvl,mmp2-mux-intc" on MMP3
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- reg : Address and length of the register set of the interrupt controller.
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If the interrupt controller is intc, address and length means the range
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of the whole interrupt controller. The "marvell,mmp3-intc" controller
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also has a secondary range for the second CPU core. If the interrupt
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controller is mux-intc, address and length means one register. Since
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address of mux-intc is in the range of intc. mux-intc is secondary
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interrupt controller.
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- reg-names : Name of the register set of the interrupt controller. It's
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only required in mux-intc interrupt controller.
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- interrupts : Should be the port interrupt shared by mux interrupts. It's
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only required in mux-intc interrupt controller.
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- interrupt-controller : Identifies the node as an interrupt controller.
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- #interrupt-cells : Specifies the number of cells needed to encode an
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interrupt source.
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- mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt
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controller.
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- mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge
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detection first.
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Example:
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intc: interrupt-controller@d4282000 {
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compatible = "mrvl,mmp2-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0xd4282000 0x1000>;
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mrvl,intc-nr-irqs = <64>;
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};
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intcmux4@d4282150 {
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compatible = "mrvl,mmp2-mux-intc";
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interrupts = <4>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x150 0x4>, <0x168 0x4>;
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reg-names = "mux status", "mux mask";
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mrvl,intc-nr-irqs = <2>;
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};
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* Marvell Orion Interrupt controller
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Required properties
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- compatible : Should be "marvell,orion-intc".
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- #interrupt-cells: Specifies the number of cells needed to encode an
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interrupt source. Supported value is <1>.
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- interrupt-controller : Declare this node to be an interrupt controller.
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- reg : Interrupt mask address. A list of 4 byte ranges, one per controller.
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One entry in the list represents 32 interrupts.
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Example:
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intc: interrupt-controller {
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compatible = "marvell,orion-intc", "marvell,intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0xfed20204 0x04>,
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<0xfed20214 0x04>;
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};
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