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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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164c05f03f
Modern device tree bindings are supposed to be created as YAML-files in accordance with dt-schema. This commit replaces two DW SPI legacy bare text bindings with YAML file. As before the bindings file states that the corresponding dts node is supposed to be compatible either with generic DW APB SSI controller or with Microsemi/Amazon/Renesas/Intel vendors-specific controllers, to have registers, interrupts and clocks properties. Though in case of Microsemi version of the controller there must be two registers resources specified. Properties like clock-names, reg-io-width, cs-gpio, num-cs, DMA and slave device sub-nodes are optional. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Cc: Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru> Cc: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Feng Tang <feng.tang@intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: linux-mips@vger.kernel.org Link: https://lore.kernel.org/r/20200529182544.9807-1-Sergey.Semin@baikalelectronics.ru Signed-off-by: Mark Brown <broonie@kernel.org>
134 lines
2.6 KiB
YAML
134 lines
2.6 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
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maintainers:
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- Mark Brown <broonie@kernel.org>
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allOf:
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- $ref: "spi-controller.yaml#"
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- if:
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properties:
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compatible:
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contains:
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enum:
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- mscc,ocelot-spi
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- mscc,jaguar2-spi
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then:
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properties:
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reg:
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minItems: 2
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properties:
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compatible:
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oneOf:
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- description: Generic DW SPI Controller
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enum:
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- snps,dw-apb-ssi
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- snps,dwc-ssi-1.01a
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- description: Microsemi Ocelot/Jaguar2 SoC SPI Controller
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items:
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- enum:
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- mscc,ocelot-spi
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- mscc,jaguar2-spi
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- const: snps,dw-apb-ssi
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- description: Amazon Alpine SPI Controller
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const: amazon,alpine-dw-apb-ssi
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- description: Renesas RZ/N1 SPI Controller
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items:
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- const: renesas,rzn1-spi
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- const: snps,dw-apb-ssi
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- description: Intel Keem Bay SPI Controller
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const: intel,keembay-ssi
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reg:
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minItems: 1
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items:
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- description: DW APB SSI controller memory mapped registers
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- description: SPI MST region map
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interrupts:
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maxItems: 1
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clocks:
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minItems: 1
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items:
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- description: SPI Controller reference clock source
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- description: APB interface clock source
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clock-names:
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minItems: 1
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items:
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- const: ssi_clk
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- const: pclk
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resets:
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maxItems: 1
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reset-names:
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const: spi
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reg-io-width:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: I/O register width (in bytes) implemented by this device
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default: 4
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enum: [ 2, 4 ]
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num-cs:
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default: 4
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minimum: 1
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maximum: 4
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dmas:
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items:
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- description: TX DMA Channel
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- description: RX DMA Channel
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dma-names:
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items:
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- const: tx
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- const: rx
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patternProperties:
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"^.*@[0-9a-f]+$":
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type: object
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properties:
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reg:
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minimum: 0
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maximum: 3
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spi-rx-bus-width:
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const: 1
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spi-tx-bus-width:
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const: 1
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- "#address-cells"
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- "#size-cells"
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- interrupts
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- clocks
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examples:
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- |
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spi@fff00000 {
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compatible = "snps,dw-apb-ssi";
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reg = <0xfff00000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0 154 4>;
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clocks = <&spi_m_clk>;
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num-cs = <2>;
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cs-gpios = <&gpio0 13 0>,
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<&gpio0 14 0>;
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};
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...
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