mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 00:46:43 +07:00
309600c14e
Currently, the selection of ECC byte ordering for software hamming is done at compilation time, which doesn't make sense when ECC byte calculation is done in hardware and byte ordering is forced by the hardware engine. In this case, only the correction is done in software and we want to force the byte-ordering no matter the value of CONFIG_MTD_NAND_ECC_SMC. This is typically the case for the FSMC (Smart Media ordering), TMIO and TXX9NDFMC (regular byte ordering) blocks. For all other use cases (pure software implementation, SM FTL and nandecctest), we keep selecting the byte ordering based on the CONFIG_MTD_NAND_ECC_SMC value. It might not be ideal for SM FTL (I'd expect Smart Media ordering to be employed by the Smart Media FTL), but this option doesn't seem to be enabled in the existing _defconfig, so I can't tell setting sm_order to true is the right choice. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
43 lines
1.2 KiB
C
43 lines
1.2 KiB
C
/*
|
|
* Copyright (C) 2000-2010 Steven J. Hill <sjhill@realitydiluted.com>
|
|
* David Woodhouse <dwmw2@infradead.org>
|
|
* Thomas Gleixner <tglx@linutronix.de>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* This file is the header for the ECC algorithm.
|
|
*/
|
|
|
|
#ifndef __MTD_NAND_ECC_H__
|
|
#define __MTD_NAND_ECC_H__
|
|
|
|
struct nand_chip;
|
|
|
|
/*
|
|
* Calculate 3 byte ECC code for eccsize byte block
|
|
*/
|
|
void __nand_calculate_ecc(const u_char *dat, unsigned int eccsize,
|
|
u_char *ecc_code, bool sm_order);
|
|
|
|
/*
|
|
* Calculate 3 byte ECC code for 256/512 byte block
|
|
*/
|
|
int nand_calculate_ecc(struct nand_chip *chip, const u_char *dat,
|
|
u_char *ecc_code);
|
|
|
|
/*
|
|
* Detect and correct a 1 bit error for eccsize byte block
|
|
*/
|
|
int __nand_correct_data(u_char *dat, u_char *read_ecc, u_char *calc_ecc,
|
|
unsigned int eccsize, bool sm_order);
|
|
|
|
/*
|
|
* Detect and correct a 1 bit error for 256/512 byte block
|
|
*/
|
|
int nand_correct_data(struct nand_chip *chip, u_char *dat, u_char *read_ecc,
|
|
u_char *calc_ecc);
|
|
|
|
#endif /* __MTD_NAND_ECC_H__ */
|