mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
fcd770059a
This patch removes frv's architecture-specific 'pcibios_set_master()' routine and lets the default PCI core based implementation handle PCI device 'latency timer' setup. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
197 lines
5.9 KiB
C
197 lines
5.9 KiB
C
/* pci-frv.c: low-level PCI access routines
|
|
*
|
|
* Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved.
|
|
* Written by David Howells (dhowells@redhat.com)
|
|
* - Derived from the i386 equivalent stuff
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License
|
|
* as published by the Free Software Foundation; either version
|
|
* 2 of the License, or (at your option) any later version.
|
|
*/
|
|
|
|
#include <linux/types.h>
|
|
#include <linux/kernel.h>
|
|
#include <linux/pci.h>
|
|
#include <linux/init.h>
|
|
#include <linux/ioport.h>
|
|
#include <linux/errno.h>
|
|
|
|
#include "pci-frv.h"
|
|
|
|
/*
|
|
* We need to avoid collisions with `mirrored' VGA ports
|
|
* and other strange ISA hardware, so we always want the
|
|
* addresses to be allocated in the 0x000-0x0ff region
|
|
* modulo 0x400.
|
|
*
|
|
* Why? Because some silly external IO cards only decode
|
|
* the low 10 bits of the IO address. The 0x00-0xff region
|
|
* is reserved for motherboard devices that decode all 16
|
|
* bits, so it's ok to allocate at, say, 0x2800-0x28ff,
|
|
* but we want to try to avoid allocating at 0x2900-0x2bff
|
|
* which might have be mirrored at 0x0100-0x03ff..
|
|
*/
|
|
resource_size_t
|
|
pcibios_align_resource(void *data, const struct resource *res,
|
|
resource_size_t size, resource_size_t align)
|
|
{
|
|
resource_size_t start = res->start;
|
|
|
|
if ((res->flags & IORESOURCE_IO) && (start & 0x300))
|
|
start = (start + 0x3ff) & ~0x3ff;
|
|
|
|
return start;
|
|
}
|
|
|
|
|
|
/*
|
|
* Handle resources of PCI devices. If the world were perfect, we could
|
|
* just allocate all the resource regions and do nothing more. It isn't.
|
|
* On the other hand, we cannot just re-allocate all devices, as it would
|
|
* require us to know lots of host bridge internals. So we attempt to
|
|
* keep as much of the original configuration as possible, but tweak it
|
|
* when it's found to be wrong.
|
|
*
|
|
* Known BIOS problems we have to work around:
|
|
* - I/O or memory regions not configured
|
|
* - regions configured, but not enabled in the command register
|
|
* - bogus I/O addresses above 64K used
|
|
* - expansion ROMs left enabled (this may sound harmless, but given
|
|
* the fact the PCI specs explicitly allow address decoders to be
|
|
* shared between expansion ROMs and other resource regions, it's
|
|
* at least dangerous)
|
|
*
|
|
* Our solution:
|
|
* (1) Allocate resources for all buses behind PCI-to-PCI bridges.
|
|
* This gives us fixed barriers on where we can allocate.
|
|
* (2) Allocate resources for all enabled devices. If there is
|
|
* a collision, just mark the resource as unallocated. Also
|
|
* disable expansion ROMs during this step.
|
|
* (3) Try to allocate resources for disabled devices. If the
|
|
* resources were assigned correctly, everything goes well,
|
|
* if they weren't, they won't disturb allocation of other
|
|
* resources.
|
|
* (4) Assign new addresses to resources which were either
|
|
* not configured at all or misconfigured. If explicitly
|
|
* requested by the user, configure expansion ROM address
|
|
* as well.
|
|
*/
|
|
|
|
static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
|
|
{
|
|
struct list_head *ln;
|
|
struct pci_bus *bus;
|
|
struct pci_dev *dev;
|
|
int idx;
|
|
struct resource *r;
|
|
|
|
/* Depth-First Search on bus tree */
|
|
for (ln=bus_list->next; ln != bus_list; ln=ln->next) {
|
|
bus = pci_bus_b(ln);
|
|
if ((dev = bus->self)) {
|
|
for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
|
|
r = &dev->resource[idx];
|
|
if (!r->start)
|
|
continue;
|
|
pci_claim_resource(dev, idx);
|
|
}
|
|
}
|
|
pcibios_allocate_bus_resources(&bus->children);
|
|
}
|
|
}
|
|
|
|
static void __init pcibios_allocate_resources(int pass)
|
|
{
|
|
struct pci_dev *dev = NULL;
|
|
int idx, disabled;
|
|
u16 command;
|
|
struct resource *r;
|
|
|
|
for_each_pci_dev(dev) {
|
|
pci_read_config_word(dev, PCI_COMMAND, &command);
|
|
for(idx = 0; idx < 6; idx++) {
|
|
r = &dev->resource[idx];
|
|
if (r->parent) /* Already allocated */
|
|
continue;
|
|
if (!r->start) /* Address not assigned at all */
|
|
continue;
|
|
if (r->flags & IORESOURCE_IO)
|
|
disabled = !(command & PCI_COMMAND_IO);
|
|
else
|
|
disabled = !(command & PCI_COMMAND_MEMORY);
|
|
if (pass == disabled) {
|
|
DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n",
|
|
r->start, r->end, r->flags, disabled, pass);
|
|
if (pci_claim_resource(dev, idx) < 0) {
|
|
/* We'll assign a new address later */
|
|
r->end -= r->start;
|
|
r->start = 0;
|
|
}
|
|
}
|
|
}
|
|
if (!pass) {
|
|
r = &dev->resource[PCI_ROM_RESOURCE];
|
|
if (r->flags & IORESOURCE_ROM_ENABLE) {
|
|
/* Turn the ROM off, leave the resource region, but keep it unregistered. */
|
|
u32 reg;
|
|
DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
|
|
r->flags &= ~IORESOURCE_ROM_ENABLE;
|
|
pci_read_config_dword(dev, dev->rom_base_reg, ®);
|
|
pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
static void __init pcibios_assign_resources(void)
|
|
{
|
|
struct pci_dev *dev = NULL;
|
|
int idx;
|
|
struct resource *r;
|
|
|
|
for_each_pci_dev(dev) {
|
|
int class = dev->class >> 8;
|
|
|
|
/* Don't touch classless devices and host bridges */
|
|
if (!class || class == PCI_CLASS_BRIDGE_HOST)
|
|
continue;
|
|
|
|
for(idx=0; idx<6; idx++) {
|
|
r = &dev->resource[idx];
|
|
|
|
/*
|
|
* Don't touch IDE controllers and I/O ports of video cards!
|
|
*/
|
|
if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) ||
|
|
(class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO)))
|
|
continue;
|
|
|
|
/*
|
|
* We shall assign a new address to this resource, either because
|
|
* the BIOS forgot to do so or because we have decided the old
|
|
* address was unusable for some reason.
|
|
*/
|
|
if (!r->start && r->end)
|
|
pci_assign_resource(dev, idx);
|
|
}
|
|
|
|
if (pci_probe & PCI_ASSIGN_ROMS) {
|
|
r = &dev->resource[PCI_ROM_RESOURCE];
|
|
r->end -= r->start;
|
|
r->start = 0;
|
|
if (r->end)
|
|
pci_assign_resource(dev, PCI_ROM_RESOURCE);
|
|
}
|
|
}
|
|
}
|
|
|
|
void __init pcibios_resource_survey(void)
|
|
{
|
|
DBG("PCI: Allocating resources\n");
|
|
pcibios_allocate_bus_resources(&pci_root_buses);
|
|
pcibios_allocate_resources(0);
|
|
pcibios_allocate_resources(1);
|
|
pcibios_assign_resources();
|
|
}
|