mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 19:05:23 +07:00
b24413180f
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
243 lines
9.5 KiB
C
243 lines
9.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
#ifndef _SPARC64_CHAFSR_H
|
|
#define _SPARC64_CHAFSR_H
|
|
|
|
/* Cheetah Asynchronous Fault Status register, ASI=0x4C VA<63:0>=0x0 */
|
|
|
|
/* Comments indicate which processor variants on which the bit definition
|
|
* is valid. Codes are:
|
|
* ch --> cheetah
|
|
* ch+ --> cheetah plus
|
|
* jp --> jalapeno
|
|
*/
|
|
|
|
/* All bits of this register except M_SYNDROME and E_SYNDROME are
|
|
* read, write 1 to clear. M_SYNDROME and E_SYNDROME are read-only.
|
|
*/
|
|
|
|
/* Software bit set by linux trap handlers to indicate that the trap was
|
|
* signalled at %tl >= 1.
|
|
*/
|
|
#define CHAFSR_TL1 (1UL << 63UL) /* n/a */
|
|
|
|
/* Unmapped error from system bus for prefetch queue or
|
|
* store queue read operation
|
|
*/
|
|
#define CHPAFSR_DTO (1UL << 59UL) /* ch+ */
|
|
|
|
/* Bus error from system bus for prefetch queue or store queue
|
|
* read operation
|
|
*/
|
|
#define CHPAFSR_DBERR (1UL << 58UL) /* ch+ */
|
|
|
|
/* Hardware corrected E-cache Tag ECC error */
|
|
#define CHPAFSR_THCE (1UL << 57UL) /* ch+ */
|
|
/* System interface protocol error, hw timeout caused */
|
|
#define JPAFSR_JETO (1UL << 57UL) /* jp */
|
|
|
|
/* SW handled correctable E-cache Tag ECC error */
|
|
#define CHPAFSR_TSCE (1UL << 56UL) /* ch+ */
|
|
/* Parity error on system snoop results */
|
|
#define JPAFSR_SCE (1UL << 56UL) /* jp */
|
|
|
|
/* Uncorrectable E-cache Tag ECC error */
|
|
#define CHPAFSR_TUE (1UL << 55UL) /* ch+ */
|
|
/* System interface protocol error, illegal command detected */
|
|
#define JPAFSR_JEIC (1UL << 55UL) /* jp */
|
|
|
|
/* Uncorrectable system bus data ECC error due to prefetch
|
|
* or store fill request
|
|
*/
|
|
#define CHPAFSR_DUE (1UL << 54UL) /* ch+ */
|
|
/* System interface protocol error, illegal ADTYPE detected */
|
|
#define JPAFSR_JEIT (1UL << 54UL) /* jp */
|
|
|
|
/* Multiple errors of the same type have occurred. This bit is set when
|
|
* an uncorrectable error or a SW correctable error occurs and the status
|
|
* bit to report that error is already set. When multiple errors of
|
|
* different types are indicated by setting multiple status bits.
|
|
*
|
|
* This bit is not set if multiple HW corrected errors with the same
|
|
* status bit occur, only uncorrectable and SW correctable ones have
|
|
* this behavior.
|
|
*
|
|
* This bit is not set when multiple ECC errors happen within a single
|
|
* 64-byte system bus transaction. Only the first ECC error in a 16-byte
|
|
* subunit will be logged. All errors in subsequent 16-byte subunits
|
|
* from the same 64-byte transaction are ignored.
|
|
*/
|
|
#define CHAFSR_ME (1UL << 53UL) /* ch,ch+,jp */
|
|
|
|
/* Privileged state error has occurred. This is a capture of PSTATE.PRIV
|
|
* at the time the error is detected.
|
|
*/
|
|
#define CHAFSR_PRIV (1UL << 52UL) /* ch,ch+,jp */
|
|
|
|
/* The following bits 51 (CHAFSR_PERR) to 33 (CHAFSR_CE) are sticky error
|
|
* bits and record the most recently detected errors. Bits accumulate
|
|
* errors that have been detected since the last write to clear the bit.
|
|
*/
|
|
|
|
/* System interface protocol error. The processor asserts its' ERROR
|
|
* pin when this event occurs and it also logs a specific cause code
|
|
* into a JTAG scannable flop.
|
|
*/
|
|
#define CHAFSR_PERR (1UL << 51UL) /* ch,ch+,jp */
|
|
|
|
/* Internal processor error. The processor asserts its' ERROR
|
|
* pin when this event occurs and it also logs a specific cause code
|
|
* into a JTAG scannable flop.
|
|
*/
|
|
#define CHAFSR_IERR (1UL << 50UL) /* ch,ch+,jp */
|
|
|
|
/* System request parity error on incoming address */
|
|
#define CHAFSR_ISAP (1UL << 49UL) /* ch,ch+,jp */
|
|
|
|
/* HW Corrected system bus MTAG ECC error */
|
|
#define CHAFSR_EMC (1UL << 48UL) /* ch,ch+ */
|
|
/* Parity error on L2 cache tag SRAM */
|
|
#define JPAFSR_ETP (1UL << 48UL) /* jp */
|
|
|
|
/* Uncorrectable system bus MTAG ECC error */
|
|
#define CHAFSR_EMU (1UL << 47UL) /* ch,ch+ */
|
|
/* Out of range memory error has occurred */
|
|
#define JPAFSR_OM (1UL << 47UL) /* jp */
|
|
|
|
/* HW Corrected system bus data ECC error for read of interrupt vector */
|
|
#define CHAFSR_IVC (1UL << 46UL) /* ch,ch+ */
|
|
/* Error due to unsupported store */
|
|
#define JPAFSR_UMS (1UL << 46UL) /* jp */
|
|
|
|
/* Uncorrectable system bus data ECC error for read of interrupt vector */
|
|
#define CHAFSR_IVU (1UL << 45UL) /* ch,ch+,jp */
|
|
|
|
/* Unmapped error from system bus */
|
|
#define CHAFSR_TO (1UL << 44UL) /* ch,ch+,jp */
|
|
|
|
/* Bus error response from system bus */
|
|
#define CHAFSR_BERR (1UL << 43UL) /* ch,ch+,jp */
|
|
|
|
/* SW Correctable E-cache ECC error for instruction fetch or data access
|
|
* other than block load.
|
|
*/
|
|
#define CHAFSR_UCC (1UL << 42UL) /* ch,ch+,jp */
|
|
|
|
/* Uncorrectable E-cache ECC error for instruction fetch or data access
|
|
* other than block load.
|
|
*/
|
|
#define CHAFSR_UCU (1UL << 41UL) /* ch,ch+,jp */
|
|
|
|
/* Copyout HW Corrected ECC error */
|
|
#define CHAFSR_CPC (1UL << 40UL) /* ch,ch+,jp */
|
|
|
|
/* Copyout Uncorrectable ECC error */
|
|
#define CHAFSR_CPU (1UL << 39UL) /* ch,ch+,jp */
|
|
|
|
/* HW Corrected ECC error from E-cache for writeback */
|
|
#define CHAFSR_WDC (1UL << 38UL) /* ch,ch+,jp */
|
|
|
|
/* Uncorrectable ECC error from E-cache for writeback */
|
|
#define CHAFSR_WDU (1UL << 37UL) /* ch,ch+,jp */
|
|
|
|
/* HW Corrected ECC error from E-cache for store merge or block load */
|
|
#define CHAFSR_EDC (1UL << 36UL) /* ch,ch+,jp */
|
|
|
|
/* Uncorrectable ECC error from E-cache for store merge or block load */
|
|
#define CHAFSR_EDU (1UL << 35UL) /* ch,ch+,jp */
|
|
|
|
/* Uncorrectable system bus data ECC error for read of memory or I/O */
|
|
#define CHAFSR_UE (1UL << 34UL) /* ch,ch+,jp */
|
|
|
|
/* HW Corrected system bus data ECC error for read of memory or I/O */
|
|
#define CHAFSR_CE (1UL << 33UL) /* ch,ch+,jp */
|
|
|
|
/* Uncorrectable ECC error from remote cache/memory */
|
|
#define JPAFSR_RUE (1UL << 32UL) /* jp */
|
|
|
|
/* Correctable ECC error from remote cache/memory */
|
|
#define JPAFSR_RCE (1UL << 31UL) /* jp */
|
|
|
|
/* JBUS parity error on returned read data */
|
|
#define JPAFSR_BP (1UL << 30UL) /* jp */
|
|
|
|
/* JBUS parity error on data for writeback or block store */
|
|
#define JPAFSR_WBP (1UL << 29UL) /* jp */
|
|
|
|
/* Foreign read to DRAM incurring correctable ECC error */
|
|
#define JPAFSR_FRC (1UL << 28UL) /* jp */
|
|
|
|
/* Foreign read to DRAM incurring uncorrectable ECC error */
|
|
#define JPAFSR_FRU (1UL << 27UL) /* jp */
|
|
|
|
#define CHAFSR_ERRORS (CHAFSR_PERR | CHAFSR_IERR | CHAFSR_ISAP | CHAFSR_EMC | \
|
|
CHAFSR_EMU | CHAFSR_IVC | CHAFSR_IVU | CHAFSR_TO | \
|
|
CHAFSR_BERR | CHAFSR_UCC | CHAFSR_UCU | CHAFSR_CPC | \
|
|
CHAFSR_CPU | CHAFSR_WDC | CHAFSR_WDU | CHAFSR_EDC | \
|
|
CHAFSR_EDU | CHAFSR_UE | CHAFSR_CE)
|
|
#define CHPAFSR_ERRORS (CHPAFSR_DTO | CHPAFSR_DBERR | CHPAFSR_THCE | \
|
|
CHPAFSR_TSCE | CHPAFSR_TUE | CHPAFSR_DUE | \
|
|
CHAFSR_PERR | CHAFSR_IERR | CHAFSR_ISAP | CHAFSR_EMC | \
|
|
CHAFSR_EMU | CHAFSR_IVC | CHAFSR_IVU | CHAFSR_TO | \
|
|
CHAFSR_BERR | CHAFSR_UCC | CHAFSR_UCU | CHAFSR_CPC | \
|
|
CHAFSR_CPU | CHAFSR_WDC | CHAFSR_WDU | CHAFSR_EDC | \
|
|
CHAFSR_EDU | CHAFSR_UE | CHAFSR_CE)
|
|
#define JPAFSR_ERRORS (JPAFSR_JETO | JPAFSR_SCE | JPAFSR_JEIC | \
|
|
JPAFSR_JEIT | CHAFSR_PERR | CHAFSR_IERR | \
|
|
CHAFSR_ISAP | JPAFSR_ETP | JPAFSR_OM | \
|
|
JPAFSR_UMS | CHAFSR_IVU | CHAFSR_TO | \
|
|
CHAFSR_BERR | CHAFSR_UCC | CHAFSR_UCU | \
|
|
CHAFSR_CPC | CHAFSR_CPU | CHAFSR_WDC | \
|
|
CHAFSR_WDU | CHAFSR_EDC | CHAFSR_EDU | \
|
|
CHAFSR_UE | CHAFSR_CE | JPAFSR_RUE | \
|
|
JPAFSR_RCE | JPAFSR_BP | JPAFSR_WBP | \
|
|
JPAFSR_FRC | JPAFSR_FRU)
|
|
|
|
/* Active JBUS request signal when error occurred */
|
|
#define JPAFSR_JBREQ (0x7UL << 24UL) /* jp */
|
|
#define JPAFSR_JBREQ_SHIFT 24UL
|
|
|
|
/* L2 cache way information */
|
|
#define JPAFSR_ETW (0x3UL << 22UL) /* jp */
|
|
#define JPAFSR_ETW_SHIFT 22UL
|
|
|
|
/* System bus MTAG ECC syndrome. This field captures the status of the
|
|
* first occurrence of the highest-priority error according to the M_SYND
|
|
* overwrite policy. After the AFSR sticky bit, corresponding to the error
|
|
* for which the M_SYND is reported, is cleared, the contents of the M_SYND
|
|
* field will be unchanged by will be unfrozen for further error capture.
|
|
*/
|
|
#define CHAFSR_M_SYNDROME (0xfUL << 16UL) /* ch,ch+,jp */
|
|
#define CHAFSR_M_SYNDROME_SHIFT 16UL
|
|
|
|
/* Agenid Id of the foreign device causing the UE/CE errors */
|
|
#define JPAFSR_AID (0x1fUL << 9UL) /* jp */
|
|
#define JPAFSR_AID_SHIFT 9UL
|
|
|
|
/* System bus or E-cache data ECC syndrome. This field captures the status
|
|
* of the first occurrence of the highest-priority error according to the
|
|
* E_SYND overwrite policy. After the AFSR sticky bit, corresponding to the
|
|
* error for which the E_SYND is reported, is cleare, the contents of the E_SYND
|
|
* field will be unchanged but will be unfrozen for further error capture.
|
|
*/
|
|
#define CHAFSR_E_SYNDROME (0x1ffUL << 0UL) /* ch,ch+,jp */
|
|
#define CHAFSR_E_SYNDROME_SHIFT 0UL
|
|
|
|
/* The AFSR must be explicitly cleared by software, it is not cleared automatically
|
|
* by a read. Writes to bits <51:33> with bits set will clear the corresponding
|
|
* bits in the AFSR. Bits associated with disrupting traps must be cleared before
|
|
* interrupts are re-enabled to prevent multiple traps for the same error. I.e.
|
|
* PSTATE.IE and AFSR bits control delivery of disrupting traps.
|
|
*
|
|
* Since there is only one AFAR, when multiple events have been logged by the
|
|
* bits in the AFSR, at most one of these events will have its status captured
|
|
* in the AFAR. The highest priority of those event bits will get AFAR logging.
|
|
* The AFAR will be unlocked and available to capture the address of another event
|
|
* as soon as the one bit in AFSR that corresponds to the event logged in AFAR is
|
|
* cleared. For example, if AFSR.CE is detected, then AFSR.UE (which overwrites
|
|
* the AFAR), and AFSR.UE is cleared by not AFSR.CE, then the AFAR will be unlocked
|
|
* and ready for another event, even though AFSR.CE is still set. The same rules
|
|
* also apply to the M_SYNDROME and E_SYNDROME fields of the AFSR.
|
|
*/
|
|
|
|
#endif /* _SPARC64_CHAFSR_H */
|