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e29f0d55e2
The Bt431 cursor generator supports simultaneous generation of a 64 x 64
and a cross hair cursor in which the cursor format control bit (bit D4)
of the command register "specifies whether the contents of the cursor
RAM are to be logically exclusive-ORed (logical zero) or ORed (logical
one) with the cross hair cursor". Rename the relevant macro accordingly.
References:
[1] "Bt431 Monolithic CMOS 64 x 64 Pixel Cursor Generator", Brooktree
Corporation, Document Number: L431001, Rev. J
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
241 lines
5.8 KiB
C
241 lines
5.8 KiB
C
/*
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* linux/drivers/video/bt431.h
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*
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* Copyright 2003 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
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* Copyright 2016 Maciej W. Rozycki <macro@linux-mips.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*/
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#include <linux/types.h>
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#define BT431_CURSOR_SIZE 64
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/*
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* Bt431 cursor generator registers, 32-bit aligned.
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* Two twin Bt431 are used on the DECstation's PMAG-AA.
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*/
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struct bt431_regs {
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volatile u16 addr_lo;
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u16 pad0;
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volatile u16 addr_hi;
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u16 pad1;
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volatile u16 addr_cmap;
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u16 pad2;
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volatile u16 addr_reg;
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u16 pad3;
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};
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static inline u16 bt431_set_value(u8 val)
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{
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return ((val << 8) | (val & 0xff)) & 0xffff;
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}
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static inline u8 bt431_get_value(u16 val)
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{
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return val & 0xff;
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}
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/*
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* Additional registers addressed indirectly.
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*/
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#define BT431_REG_CMD 0x0000
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#define BT431_REG_CXLO 0x0001
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#define BT431_REG_CXHI 0x0002
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#define BT431_REG_CYLO 0x0003
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#define BT431_REG_CYHI 0x0004
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#define BT431_REG_WXLO 0x0005
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#define BT431_REG_WXHI 0x0006
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#define BT431_REG_WYLO 0x0007
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#define BT431_REG_WYHI 0x0008
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#define BT431_REG_WWLO 0x0009
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#define BT431_REG_WWHI 0x000a
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#define BT431_REG_WHLO 0x000b
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#define BT431_REG_WHHI 0x000c
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#define BT431_REG_CRAM_BASE 0x0000
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#define BT431_REG_CRAM_END 0x01ff
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/*
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* Command register.
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*/
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#define BT431_CMD_CURS_ENABLE 0x40
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#define BT431_CMD_XHAIR_ENABLE 0x20
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#define BT431_CMD_OR_CURSORS 0x10
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#define BT431_CMD_XOR_CURSORS 0x00
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#define BT431_CMD_1_1_MUX 0x00
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#define BT431_CMD_4_1_MUX 0x04
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#define BT431_CMD_5_1_MUX 0x08
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#define BT431_CMD_xxx_MUX 0x0c
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#define BT431_CMD_THICK_1 0x00
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#define BT431_CMD_THICK_3 0x01
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#define BT431_CMD_THICK_5 0x02
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#define BT431_CMD_THICK_7 0x03
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static inline void bt431_select_reg(struct bt431_regs *regs, int ir)
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{
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/*
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* The compiler splits the write in two bytes without these
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* helper variables.
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*/
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volatile u16 *lo = &(regs->addr_lo);
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volatile u16 *hi = &(regs->addr_hi);
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mb();
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*lo = bt431_set_value(ir & 0xff);
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wmb();
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*hi = bt431_set_value((ir >> 8) & 0xff);
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}
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/* Autoincrement read/write. */
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static inline u8 bt431_read_reg_inc(struct bt431_regs *regs)
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{
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/*
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* The compiler splits the write in two bytes without the
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* helper variable.
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*/
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volatile u16 *r = &(regs->addr_reg);
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mb();
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return bt431_get_value(*r);
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}
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static inline void bt431_write_reg_inc(struct bt431_regs *regs, u8 value)
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{
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/*
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* The compiler splits the write in two bytes without the
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* helper variable.
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*/
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volatile u16 *r = &(regs->addr_reg);
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mb();
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*r = bt431_set_value(value);
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}
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static inline u8 bt431_read_reg(struct bt431_regs *regs, int ir)
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{
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bt431_select_reg(regs, ir);
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return bt431_read_reg_inc(regs);
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}
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static inline void bt431_write_reg(struct bt431_regs *regs, int ir, u8 value)
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{
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bt431_select_reg(regs, ir);
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bt431_write_reg_inc(regs, value);
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}
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/* Autoincremented read/write for the cursor map. */
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static inline u16 bt431_read_cmap_inc(struct bt431_regs *regs)
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{
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/*
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* The compiler splits the write in two bytes without the
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* helper variable.
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*/
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volatile u16 *r = &(regs->addr_cmap);
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mb();
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return *r;
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}
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static inline void bt431_write_cmap_inc(struct bt431_regs *regs, u16 value)
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{
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/*
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* The compiler splits the write in two bytes without the
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* helper variable.
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*/
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volatile u16 *r = &(regs->addr_cmap);
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mb();
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*r = value;
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}
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static inline u16 bt431_read_cmap(struct bt431_regs *regs, int cr)
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{
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bt431_select_reg(regs, cr);
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return bt431_read_cmap_inc(regs);
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}
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static inline void bt431_write_cmap(struct bt431_regs *regs, int cr, u16 value)
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{
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bt431_select_reg(regs, cr);
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bt431_write_cmap_inc(regs, value);
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}
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static inline void bt431_enable_cursor(struct bt431_regs *regs)
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{
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bt431_write_reg(regs, BT431_REG_CMD,
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BT431_CMD_CURS_ENABLE | BT431_CMD_OR_CURSORS
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| BT431_CMD_4_1_MUX | BT431_CMD_THICK_1);
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}
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static inline void bt431_erase_cursor(struct bt431_regs *regs)
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{
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bt431_write_reg(regs, BT431_REG_CMD, BT431_CMD_4_1_MUX);
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}
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static inline void bt431_position_cursor(struct bt431_regs *regs, u16 x, u16 y)
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{
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/*
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* Magic from the MACH sources.
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*
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* Cx = x + D + H - P
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* P = 37 if 1:1, 52 if 4:1, 57 if 5:1
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* D = pixel skew between outdata and external data
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* H = pixels between HSYNCH falling and active video
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*
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* Cy = y + V - 32
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* V = scanlines between HSYNCH falling, two or more
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* clocks after VSYNCH falling, and active video
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*/
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x += 412 - 52;
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y += 68 - 32;
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/* Use autoincrement. */
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bt431_select_reg(regs, BT431_REG_CXLO);
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bt431_write_reg_inc(regs, x & 0xff); /* BT431_REG_CXLO */
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bt431_write_reg_inc(regs, (x >> 8) & 0x0f); /* BT431_REG_CXHI */
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bt431_write_reg_inc(regs, y & 0xff); /* BT431_REG_CYLO */
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bt431_write_reg_inc(regs, (y >> 8) & 0x0f); /* BT431_REG_CYHI */
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}
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static inline void bt431_set_cursor(struct bt431_regs *regs,
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const char *data, const char *mask,
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u16 rop, u16 width, u16 height)
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{
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u16 x, y;
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int i;
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i = 0;
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width = DIV_ROUND_UP(width, 8);
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bt431_select_reg(regs, BT431_REG_CRAM_BASE);
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for (y = 0; y < BT431_CURSOR_SIZE; y++)
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for (x = 0; x < BT431_CURSOR_SIZE / 8; x++) {
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u16 val = 0;
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if (y < height && x < width) {
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val = mask[i];
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if (rop == ROP_XOR)
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val = (val << 8) | (val ^ data[i]);
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else
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val = (val << 8) | (val & data[i]);
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i++;
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}
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bt431_write_cmap_inc(regs, val);
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}
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}
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static inline void bt431_init_cursor(struct bt431_regs *regs)
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{
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/* no crosshair window */
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bt431_select_reg(regs, BT431_REG_WXLO);
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bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WXLO */
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bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WXHI */
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bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WYLO */
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bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WYHI */
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bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WWLO */
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bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WWHI */
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bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WHLO */
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bt431_write_reg_inc(regs, 0x00); /* BT431_REG_WHHI */
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}
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