linux_dsm_epyc7002/Documentation/devicetree
Linus Torvalds 1b88176b9c MTD core:
* Dropped inactive maintainers, updated the repositories and added the IRC
   channel.
 * Debugfs functions improvements.
 * Initialized of more structure parameters.
 * Misc fixes reported by robots.
 
 MTD devices:
 * spear_smi: Fixed Write Burst mode
 * New Intel IXP4xx flash probing hook.
 
 Raw NAND core:
 * Useless extra checks dropped.
 * Updated the detection of the bad block markers position
 
 Raw NAND controller drivers:
 * Cadence : New driver
 * Brcmnand: Support for flash-dma v0 + fixes
 * Denali : Support for the legacy controller/chip DT representation
            dropped
 * Superfluous dev_err() calls removed
 
 SPI NOR core changes:
 * introduce 'struct spi_nor_controller_ops',
 * clean the Register Operations methods,
 * use dev_dbg insted of dev_err for low level info,
 * fix retlen handling in sst_write(),
 * fix silent truncations in spi_nor_read and spi_nor_read_raw(),
 * fix the clearing of QE bit on lock()/unlock(),
 * rework the disabling of the block write protection,
 * rework the Quad Enable methods,
 * make sure nor->spimem and nor->controller_ops are mutually exclusive,
 * set default Quad Enable method for ISSI flashes,
 * add support for few flashes.
 
 SPI NOR controller drivers changes:
 * intel-spi:
   - support chips without software sequencer,
   - add support for Intel Cannon Lake and Intel Comet Lake-H flashes.
 
 CFI core changes:
 * Code cleanups related useless initializers and coding style issues
 * Fix for a possible double free problem in cfi_cmdset_0002
 * Improved error reporting and handling in cfi_cmdset_0002 core for HyperFlash
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Merge tag 'mtd/for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
 "MTD core:
   - drop inactive maintainers, update the repositories and add IRC
     channel
   - debugfs functions improvements
   - initialize more structure parameters
   - misc fixes reported by robots

  MTD devices:
   - spear_smi: Fixed Write Burst mode
   - new Intel IXP4xx flash probing hook

  Raw NAND core:
   - useless extra checks dropped
   - update the detection of the bad block markers position

  Raw NAND controller drivers:
   - Cadence: new driver
   - Brcmnand: support for flash-dma v0 + fixes
   - Denali: drop support for the legacy controller/chip DT representation
   - superfluous dev_err() calls removed

  SPI NOR core changes:
   - introduce 'struct spi_nor_controller_ops'
   - clean the Register Operations methods
   - use dev_dbg insted of dev_err for low level info
   - fix retlen handling in sst_write()
   - fix silent truncations in spi_nor_read and spi_nor_read_raw()
   - fix the clearing of QE bit on lock()/unlock()
   - rework the disabling of the block write protection
   - rework the Quad Enable methods
   - make sure nor->spimem and nor->controller_ops are mutually exclusive
   - set default Quad Enable method for ISSI flashes
   - add support for few flashes

  SPI NOR controller drivers changes:
   - intel-spi:
      - support chips without software sequencer
      - add support for Intel Cannon Lake and Intel Comet Lake-H flashes

  CFI core changes:
   - code cleanups related useless initializers and coding style issues
   - fix for a possible double free problem in cfi_cmdset_0002
   - improved HyperFlash error reporting and handling in cfi_cmdset_0002 core"

* tag 'mtd/for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (73 commits)
  mtd: devices: fix mchp23k256 read and write
  mtd: no need to check return value of debugfs_create functions
  mtd: spi-nor: Set default Quad Enable method for ISSI flashes
  mtd: spi-nor: Add support for is25wp256
  mtd: spi-nor: Add support for w25q256jw
  mtd: spi-nor: Move condition to avoid a NULL check
  mtd: spi-nor: Make sure nor->spimem and nor->controller_ops are mutually exclusive
  mtd: spi-nor: Rename Quad Enable methods
  mtd: spi-nor: Merge spansion Quad Enable methods
  mtd: spi-nor: Rename CR_QUAD_EN_SPAN to SR2_QUAD_EN_BIT1
  mtd: spi-nor: Extend the SR Read Back test
  mtd: spi-nor: Rework the disabling of block write protection
  mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()
  mtd: cfi_cmdset_0002: fix delayed error detection on HyperFlash
  mtd: cfi_cmdset_0002: only check errors when ready in cfi_check_err_status()
  mtd: cfi_cmdset_0002: don't free cfi->cfiq in error path of cfi_amdstd_setup()
  mtd: cfi_cmdset_*: kill useless 'ret' variable initializers
  mtd: cfi_util: use DIV_ROUND_UP() in cfi_udelay()
  mtd: spi-nor: Print debug message when the read back test fails
  mtd: spi-nor: Check all the bits written, not just the BP ones
  ...
2019-11-25 11:55:30 -08:00
..
bindings MTD core: 2019-11-25 11:55:30 -08:00
booting-without-of.txt docs: arm: convert docs to ReST and rename to *.rst 2019-07-15 09:20:24 -03:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt
overlay-notes.txt
usage-model.txt
writing-schema.rst devicetree: Expose dtbs_check and dt_binding_check some more 2019-08-13 16:30:08 -06:00