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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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71b3c126e6
When switch_mm() activates a new PGD, it also sets a bit that tells other CPUs that the PGD is in use so that TLB flush IPIs will be sent. In order for that to work correctly, the bit needs to be visible prior to loading the PGD and therefore starting to fill the local TLB. Document all the barriers that make this work correctly and add a couple that were missing. Signed-off-by: Andy Lutomirski <luto@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@redhat.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mm@kvack.org Cc: stable@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
350 lines
9.2 KiB
C
350 lines
9.2 KiB
C
#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/spinlock.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/cpu.h>
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#include <asm/tlbflush.h>
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#include <asm/mmu_context.h>
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#include <asm/cache.h>
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#include <asm/apic.h>
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#include <asm/uv/uv.h>
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#include <linux/debugfs.h>
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/*
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* Smarter SMP flushing macros.
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* c/o Linus Torvalds.
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*
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* These mean you can really definitely utterly forget about
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* writing to user space from interrupts. (Its not allowed anyway).
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*
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* Optimizations Manfred Spraul <manfred@colorfullife.com>
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*
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* More scalable flush, from Andi Kleen
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*
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* Implement flush IPI by CALL_FUNCTION_VECTOR, Alex Shi
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*/
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struct flush_tlb_info {
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struct mm_struct *flush_mm;
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unsigned long flush_start;
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unsigned long flush_end;
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};
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/*
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* We cannot call mmdrop() because we are in interrupt context,
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* instead update mm->cpu_vm_mask.
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*/
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void leave_mm(int cpu)
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{
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struct mm_struct *active_mm = this_cpu_read(cpu_tlbstate.active_mm);
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if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK)
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BUG();
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if (cpumask_test_cpu(cpu, mm_cpumask(active_mm))) {
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cpumask_clear_cpu(cpu, mm_cpumask(active_mm));
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load_cr3(swapper_pg_dir);
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/*
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* This gets called in the idle path where RCU
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* functions differently. Tracing normally
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* uses RCU, so we have to call the tracepoint
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* specially here.
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*/
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trace_tlb_flush_rcuidle(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
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}
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}
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EXPORT_SYMBOL_GPL(leave_mm);
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/*
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* The flush IPI assumes that a thread switch happens in this order:
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* [cpu0: the cpu that switches]
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* 1) switch_mm() either 1a) or 1b)
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* 1a) thread switch to a different mm
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* 1a1) set cpu_tlbstate to TLBSTATE_OK
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* Now the tlb flush NMI handler flush_tlb_func won't call leave_mm
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* if cpu0 was in lazy tlb mode.
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* 1a2) update cpu active_mm
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* Now cpu0 accepts tlb flushes for the new mm.
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* 1a3) cpu_set(cpu, new_mm->cpu_vm_mask);
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* Now the other cpus will send tlb flush ipis.
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* 1a4) change cr3.
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* 1a5) cpu_clear(cpu, old_mm->cpu_vm_mask);
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* Stop ipi delivery for the old mm. This is not synchronized with
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* the other cpus, but flush_tlb_func ignore flush ipis for the wrong
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* mm, and in the worst case we perform a superfluous tlb flush.
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* 1b) thread switch without mm change
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* cpu active_mm is correct, cpu0 already handles flush ipis.
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* 1b1) set cpu_tlbstate to TLBSTATE_OK
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* 1b2) test_and_set the cpu bit in cpu_vm_mask.
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* Atomically set the bit [other cpus will start sending flush ipis],
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* and test the bit.
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* 1b3) if the bit was 0: leave_mm was called, flush the tlb.
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* 2) switch %%esp, ie current
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*
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* The interrupt must handle 2 special cases:
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* - cr3 is changed before %%esp, ie. it cannot use current->{active_,}mm.
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* - the cpu performs speculative tlb reads, i.e. even if the cpu only
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* runs in kernel space, the cpu could load tlb entries for user space
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* pages.
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*
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* The good news is that cpu_tlbstate is local to each cpu, no
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* write/read ordering problems.
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*/
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/*
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* TLB flush funcation:
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* 1) Flush the tlb entries if the cpu uses the mm that's being flushed.
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* 2) Leave the mm if we are in the lazy tlb mode.
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*/
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static void flush_tlb_func(void *info)
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{
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struct flush_tlb_info *f = info;
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inc_irq_stat(irq_tlb_count);
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if (f->flush_mm != this_cpu_read(cpu_tlbstate.active_mm))
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return;
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if (!f->flush_end)
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f->flush_end = f->flush_start + PAGE_SIZE;
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count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED);
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if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK) {
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if (f->flush_end == TLB_FLUSH_ALL) {
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local_flush_tlb();
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trace_tlb_flush(TLB_REMOTE_SHOOTDOWN, TLB_FLUSH_ALL);
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} else {
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unsigned long addr;
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unsigned long nr_pages =
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(f->flush_end - f->flush_start) / PAGE_SIZE;
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addr = f->flush_start;
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while (addr < f->flush_end) {
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__flush_tlb_single(addr);
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addr += PAGE_SIZE;
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}
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trace_tlb_flush(TLB_REMOTE_SHOOTDOWN, nr_pages);
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}
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} else
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leave_mm(smp_processor_id());
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}
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void native_flush_tlb_others(const struct cpumask *cpumask,
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struct mm_struct *mm, unsigned long start,
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unsigned long end)
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{
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struct flush_tlb_info info;
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info.flush_mm = mm;
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info.flush_start = start;
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info.flush_end = end;
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count_vm_tlb_event(NR_TLB_REMOTE_FLUSH);
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trace_tlb_flush(TLB_REMOTE_SEND_IPI, end - start);
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if (is_uv_system()) {
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unsigned int cpu;
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cpu = smp_processor_id();
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cpumask = uv_flush_tlb_others(cpumask, mm, start, end, cpu);
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if (cpumask)
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smp_call_function_many(cpumask, flush_tlb_func,
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&info, 1);
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return;
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}
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smp_call_function_many(cpumask, flush_tlb_func, &info, 1);
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}
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void flush_tlb_current_task(void)
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{
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struct mm_struct *mm = current->mm;
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preempt_disable();
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count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL);
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/* This is an implicit full barrier that synchronizes with switch_mm. */
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local_flush_tlb();
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trace_tlb_flush(TLB_LOCAL_SHOOTDOWN, TLB_FLUSH_ALL);
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if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
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flush_tlb_others(mm_cpumask(mm), mm, 0UL, TLB_FLUSH_ALL);
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preempt_enable();
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}
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/*
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* See Documentation/x86/tlb.txt for details. We choose 33
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* because it is large enough to cover the vast majority (at
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* least 95%) of allocations, and is small enough that we are
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* confident it will not cause too much overhead. Each single
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* flush is about 100 ns, so this caps the maximum overhead at
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* _about_ 3,000 ns.
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*
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* This is in units of pages.
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*/
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static unsigned long tlb_single_page_flush_ceiling __read_mostly = 33;
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void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
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unsigned long end, unsigned long vmflag)
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{
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unsigned long addr;
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/* do a global flush by default */
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unsigned long base_pages_to_flush = TLB_FLUSH_ALL;
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preempt_disable();
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if (current->active_mm != mm) {
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/* Synchronize with switch_mm. */
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smp_mb();
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goto out;
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}
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if (!current->mm) {
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leave_mm(smp_processor_id());
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/* Synchronize with switch_mm. */
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smp_mb();
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goto out;
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}
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if ((end != TLB_FLUSH_ALL) && !(vmflag & VM_HUGETLB))
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base_pages_to_flush = (end - start) >> PAGE_SHIFT;
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/*
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* Both branches below are implicit full barriers (MOV to CR or
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* INVLPG) that synchronize with switch_mm.
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*/
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if (base_pages_to_flush > tlb_single_page_flush_ceiling) {
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base_pages_to_flush = TLB_FLUSH_ALL;
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count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL);
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local_flush_tlb();
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} else {
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/* flush range by one by one 'invlpg' */
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for (addr = start; addr < end; addr += PAGE_SIZE) {
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count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ONE);
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__flush_tlb_single(addr);
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}
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}
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trace_tlb_flush(TLB_LOCAL_MM_SHOOTDOWN, base_pages_to_flush);
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out:
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if (base_pages_to_flush == TLB_FLUSH_ALL) {
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start = 0UL;
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end = TLB_FLUSH_ALL;
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}
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if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
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flush_tlb_others(mm_cpumask(mm), mm, start, end);
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preempt_enable();
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}
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long start)
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{
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struct mm_struct *mm = vma->vm_mm;
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preempt_disable();
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if (current->active_mm == mm) {
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if (current->mm) {
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/*
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* Implicit full barrier (INVLPG) that synchronizes
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* with switch_mm.
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*/
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__flush_tlb_one(start);
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} else {
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leave_mm(smp_processor_id());
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/* Synchronize with switch_mm. */
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smp_mb();
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}
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}
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if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids)
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flush_tlb_others(mm_cpumask(mm), mm, start, 0UL);
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preempt_enable();
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}
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static void do_flush_tlb_all(void *info)
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{
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count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED);
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__flush_tlb_all();
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if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_LAZY)
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leave_mm(smp_processor_id());
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}
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void flush_tlb_all(void)
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{
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count_vm_tlb_event(NR_TLB_REMOTE_FLUSH);
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on_each_cpu(do_flush_tlb_all, NULL, 1);
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}
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static void do_kernel_range_flush(void *info)
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{
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struct flush_tlb_info *f = info;
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unsigned long addr;
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/* flush range by one by one 'invlpg' */
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for (addr = f->flush_start; addr < f->flush_end; addr += PAGE_SIZE)
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__flush_tlb_single(addr);
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}
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void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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{
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/* Balance as user space task's flush, a bit conservative */
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if (end == TLB_FLUSH_ALL ||
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(end - start) > tlb_single_page_flush_ceiling * PAGE_SIZE) {
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on_each_cpu(do_flush_tlb_all, NULL, 1);
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} else {
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struct flush_tlb_info info;
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info.flush_start = start;
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info.flush_end = end;
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on_each_cpu(do_kernel_range_flush, &info, 1);
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}
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}
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static ssize_t tlbflush_read_file(struct file *file, char __user *user_buf,
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size_t count, loff_t *ppos)
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{
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char buf[32];
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unsigned int len;
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len = sprintf(buf, "%ld\n", tlb_single_page_flush_ceiling);
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return simple_read_from_buffer(user_buf, count, ppos, buf, len);
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}
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static ssize_t tlbflush_write_file(struct file *file,
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const char __user *user_buf, size_t count, loff_t *ppos)
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{
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char buf[32];
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ssize_t len;
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int ceiling;
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len = min(count, sizeof(buf) - 1);
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if (copy_from_user(buf, user_buf, len))
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return -EFAULT;
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buf[len] = '\0';
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if (kstrtoint(buf, 0, &ceiling))
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return -EINVAL;
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if (ceiling < 0)
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return -EINVAL;
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tlb_single_page_flush_ceiling = ceiling;
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return count;
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}
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static const struct file_operations fops_tlbflush = {
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.read = tlbflush_read_file,
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.write = tlbflush_write_file,
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.llseek = default_llseek,
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};
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static int __init create_tlb_single_page_flush_ceiling(void)
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{
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debugfs_create_file("tlb_single_page_flush_ceiling", S_IRUSR | S_IWUSR,
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arch_debugfs_dir, NULL, &fops_tlbflush);
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return 0;
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}
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late_initcall(create_tlb_single_page_flush_ceiling);
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